EP4SGX530KH40C2N Altera, EP4SGX530KH40C2N Datasheet - Page 1044
EP4SGX530KH40C2N
Manufacturer Part Number
EP4SGX530KH40C2N
Description
IC STRATIX IV FPGA 530K 1517HBGA
Manufacturer
Altera
Series
Stratix® IV GXr
Datasheets
1.EP4SGX110DF29C3N.pdf
(80 pages)
2.EP4SGX110DF29C3N.pdf
(1154 pages)
3.EP4SGX110DF29C3N.pdf
(432 pages)
4.EP4SGX110DF29C3N.pdf
(22 pages)
5.EP4SGX110DF29C3N.pdf
(30 pages)
6.EP4SGX110DF29C3N.pdf
(72 pages)
Specifications of EP4SGX530KH40C2N
Number Of Logic Elements/cells
531200
Number Of Labs/clbs
21248
Total Ram Bits
27376
Number Of I /o
744
Voltage - Supply
0.87 V ~ 0.93 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
1517-HBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Available stocks
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Part Number
Manufacturer
Quantity
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Part Number:
EP4SGX530KH40C2N
Manufacturer:
ALTERA
Quantity:
237
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2–26
Figure 2–9. FC4G Instance Settings (Reconfig Screen)
Stratix IV Device Handbook Volume 3
f
■
For more information about the starting channel numbers, refer to the “Logical
Channel Addressing” section of the
Reconfig screen—Set the starting channel number to 0. Because offset cancellation
is required for receiver channels, the Offset Cancellation for Receiver Channels
option is automatically enabled. Ensure that you connect the reconfig_fromgxb
and reconfig_togxb ports with the dynamic reconfiguration controller
(Figure
2–9).
Stratix IV Dynamic Reconfiguration
Chapter 2: Transceiver Design Flow Guide for Stratix IV Devices
Example 1: Fibre Channel Protocol Application
February 2011 Altera Corporation
chapter.
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