EP4SGX530KH40C2N Altera, EP4SGX530KH40C2N Datasheet - Page 677
EP4SGX530KH40C2N
Manufacturer Part Number
EP4SGX530KH40C2N
Description
IC STRATIX IV FPGA 530K 1517HBGA
Manufacturer
Altera
Series
Stratix® IV GXr
Datasheets
1.EP4SGX110DF29C3N.pdf
(80 pages)
2.EP4SGX110DF29C3N.pdf
(1154 pages)
3.EP4SGX110DF29C3N.pdf
(432 pages)
4.EP4SGX110DF29C3N.pdf
(22 pages)
5.EP4SGX110DF29C3N.pdf
(30 pages)
6.EP4SGX110DF29C3N.pdf
(72 pages)
Specifications of EP4SGX530KH40C2N
Number Of Logic Elements/cells
531200
Number Of Labs/clbs
21248
Total Ram Bits
27376
Number Of I /o
744
Voltage - Supply
0.87 V ~ 0.93 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
1517-HBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
EP4SGX530KH40C2N
Manufacturer:
ALTERA
Quantity:
237
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Chapter 2: Transceiver Clocking in Stratix IV Devices
Input Reference Clocking
Figure 2–3. Input Reference Clock Sources Across Transceiver Blocks
February 2011 Altera Corporation
To FPGA Fabric
Figure 2–3
receiver CDRs in four transceiver blocks on the right side of the EP4SGX530F45
device. In this figure, the input reference clock sources for four transceiver blocks are
located only on the right side of the device but the EP4SGX530NF45 device has similar
input reference clock resources available for the four transceiver blocks located on the
left side of the device as well.
Figure 2–3
of ITB clock lines available in any Stratix IV GX device is equal to the number of
refclk pins available in that device.
shows the input reference clock sources for CMU PLLs, ATX PLLs, and
also shows the ITB clock lines on the right side of the device. The number
ITB[7:0]
8
refclk0
refclk1
refclk0
refclk0
refclk0
refclk1
6
6
refclk1
6
refclk1
6
2
2
2
2
2
2
2
2
PLL Cascade Clock
PLL Cascade Clock
Global Clock Line
Global Clock Line
Global Clock Line
PLL Cascade Clock
Global Clock Line
PLL Cascade Clock
Global Clock Line
PLL Cascade Clock
Global Clock Line
PLL Cascade Clock
ITB Clock Lines
ITB Clock Lines
8
8
6
6
6
6
Stratix IV Device Handbook Volume 2: Transceivers
Transceiver Block GXBR3
Transceiver Block GXBR2
Transceiver Block GXBR1
Transceiver Block GXBR0
ATX PLL R1 (6G)
ATX PLL R0 (6G)
Two CMU PLLs
Two CMU PLLs
Two CMU PLLs
Two CMU PLLs
Four RX CDRs
Four RX CDRs
Four RX CDRs
Four RX CDRs
and
and
and
and
2–5
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