XC3S1500-5FGG676C Xilinx Inc, XC3S1500-5FGG676C Datasheet - Page 126
![SPARTAN-3A FPGA 1.5M 676-FBGA](/photos/6/73/67300/b-676_sml.jpg)
XC3S1500-5FGG676C
Manufacturer Part Number
XC3S1500-5FGG676C
Description
SPARTAN-3A FPGA 1.5M 676-FBGA
Manufacturer
Xilinx Inc
Series
Spartan™-3r
Datasheet
1.XC3S50-4VQG100C.pdf
(217 pages)
Specifications of XC3S1500-5FGG676C
Number Of Logic Elements/cells
29952
Number Of Labs/clbs
3328
Total Ram Bits
589824
Number Of I /o
487
Number Of Gates
1500000
Voltage - Supply
1.14 V ~ 1.26 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
676-BBGA
Package
676FBGA
Family Name
Spartan®-3
Device Logic Units
29952
Device System Gates
1500000
Maximum Internal Frequency
725 MHz
Typical Operating Supply Voltage
1.2 V
Maximum Number Of User I/os
487
Ram Bits
589824
For Use With
NANO-SPARTAN - KIT NANOBOARD AND SPARTAN3 DC807-1001 - DAUGHTER CARD XILINX SPARTAN 3
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
XC3S1500-5FGG676C
Manufacturer:
XilinxInc
Quantity:
3 000
Company:
Part Number:
XC3S1500-5FGG676C
Manufacturer:
Xilinx Inc
Quantity:
10 000
Part Number:
XC3S1500-5FGG676C
Manufacturer:
XILINX/赛灵思
Quantity:
20 000
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Spartan-3 FPGA Family: Pinout Descriptions
VQ100 Footprint
126
22
14
7
0
IO_L40N_7/VREF_7
IO_L24N_6/VREF_6
IO_L40P_6/VREF_6
IO_L01P_7/VRN_7
IO_L01N_7/VRP_7
IO_L01P_6/VRN_6
IO_L01N_6/VRP_6
Figure 42: VQ100 Package Footprint (top view). Note pin 1 indicator in top-left corner and logo orientation.
I/O: Unrestricted, general-purpose user I/O
DCI: User I/O or reference resistor input for
bank
CONFIG: Dedicated configuration pins
N.C.: No unconnected pins in this package
IO_L21N_7
IO_L23N_7
IO_L40N_6
IO_L21P_7
IO_L23P_7
IO_L40P_7
IO_L24P_6
VCCAUX
VCCO_7
VCCO_6
VCCINT
GND
GND
GND
M1
M0
IO
IO
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
1
2
3
4
5
6
7
8
9
(
no VREF, no DCI)
Bank 5
Bank 0
12
10
8
4
DUAL: Configuration pin, then possible
user I/O
GCLK: User I/O or global clock buffer
input
JTAG: Dedicated JTAG port pins
GND: Ground
www.xilinx.com
(no VREF)
Bank 1
Bank 4
7
8
4
4
VREF: User I/O or input voltage reference for
bank
VCCO: Output voltage supply for bank
VCCINT: Internal core voltage supply (+1.2V)
VCCAUX: Auxiliary voltage supply (+2.5V)
DS099-4 (v2.5) December 4, 2009
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
Product Specification
IO_L01N_2/VRP_2
IO_L01P_2/VRN_2
GND
IO_L21N_2
IO_L21P_2
VCCO_2
VCCINT
IO_L24N_2
IO_L24P_2
GND
IO_L40N_2
IO_L40P_2/VREF_2
IO_L40N_3/VREF_3
IO_L40P_3
IO_L24N_3
IO_L24P_3
IO
VCCAUX
VCCO_3
GND
IO
IO_L01N_3/VRP_3
IO_L01P_3/VRN_3
CCLK
DONE
DS099-4_15_042303
R
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