XC5VLX30-2FF676C Xilinx Inc, XC5VLX30-2FF676C Datasheet - Page 161
![IC FPGA VIRTEX-5 30K 676FBGA](/photos/6/73/67306/xilinx-_1136-fbga_sml.jpg)
XC5VLX30-2FF676C
Manufacturer Part Number
XC5VLX30-2FF676C
Description
IC FPGA VIRTEX-5 30K 676FBGA
Manufacturer
Xilinx Inc
Series
Virtex™-5 LXr
Datasheets
1.XC5VLX30-1FFG324C.pdf
(91 pages)
2.XC5VLX30-1FFG324C.pdf
(13 pages)
3.XC5VLX30-1FFG324C.pdf
(385 pages)
Specifications of XC5VLX30-2FF676C
Number Of Logic Elements/cells
30720
Number Of Labs/clbs
2400
Total Ram Bits
1179648
Number Of I /o
400
Voltage - Supply
0.95 V ~ 1.05 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
676-BBGA, FCBGA
For Use With
HW-AFX-FF676-500-G - BOARD DEV VIRTEX 5 FF676
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Gates
-
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Virtex-5 FPGA User Guide
UG190 (v5.3) May 17, 2010
Block RAM and FIFO ECC Primitive
Figure 4-29
FIFO36_72 ECC primitive. The FIFO36_72 only supports standard mode.
X-Ref Target - Figure 4-29
X-Ref Target - Figure 4-30
shows the block RAM (RAMB36SDP) ECC primitive.
Figure 4-29: RAMB36SDP: Block RAM ECC Primitive
Figure 4-30: FIFO36_72: FIFO ECC Primitive
www.xilinx.com
DI[63:0]
DIP[7:0]
(Decode Only)
WRADDR[8:0]
RDADDR[8:0]
WREN
RDEN
SSR
WRCLK
RDCLK
DI[63:0]
DIP[7:0]
WREN
RDEN
RST
WRCLK
RDCLK
RAMB36SDP
FIFO36_72
ECCPARITY[7:0]
ECCPARITY[7:0]
ALMOSTEMPTY
WRCOUNT[8:0]
RDCOUNT[8:0]
ALMOSTFULL
Encode Only)
(Standard or
DBITERR
SBITERR
SBITERR
DBITERR
DOP[7:0]
DO[63:0]
DOP[7:0]
DO[63:0]
WRERR
RDERR
EMPTY
FULL
ug190_4_26_022207
ug190_4_34_022207
Built-in Error Correction
Figure 4-30
shows the
161
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