XC5VLX30-2FF676C Xilinx Inc, XC5VLX30-2FF676C Datasheet - Page 187
![IC FPGA VIRTEX-5 30K 676FBGA](/photos/6/73/67306/xilinx-_1136-fbga_sml.jpg)
XC5VLX30-2FF676C
Manufacturer Part Number
XC5VLX30-2FF676C
Description
IC FPGA VIRTEX-5 30K 676FBGA
Manufacturer
Xilinx Inc
Series
Virtex™-5 LXr
Datasheets
1.XC5VLX30-1FFG324C.pdf
(91 pages)
2.XC5VLX30-1FFG324C.pdf
(13 pages)
3.XC5VLX30-1FFG324C.pdf
(385 pages)
Specifications of XC5VLX30-2FF676C
Number Of Logic Elements/cells
30720
Number Of Labs/clbs
2400
Total Ram Bits
1179648
Number Of I /o
400
Voltage - Supply
0.95 V ~ 1.05 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
676-BBGA, FCBGA
For Use With
HW-AFX-FF676-500-G - BOARD DEV VIRTEX 5 FF676
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Gates
-
Available stocks
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Virtex-5 FPGA User Guide
UG190 (v5.3) May 17, 2010
X-Ref Target - Figure 5-12
If two single-port 128 x 1-bit modules are built, the two RAM128X1S primitives can occupy
a SLICEM, as long as they share the same clock, write enable, and shared read and write
port address inputs. This configuration equates to 128 x 2-bit single-port distributed RAM.
WCLK
A[6:0]
WE
D
A6 (CX)
Figure 5-12: Distributed RAM (RAM128X1S)
(WE/CE)
www.xilinx.com
(CLK)
(DX)
[5:0]
[5:0]
RAM128X1S
7
7
DI1
A[6:1]
WA[7:1]
CLK
WE
DI1
A[6:1]
WA[7:1]
CLK
WE
SPRAM64
SPRAM64
O6
O6
F7BMUX
0
D Q
(Optional)
ug190_5_12_050506
CLB Overview
Output
Registered
Output
187
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