XC6VCX75T-2FFG784C Xilinx Inc, XC6VCX75T-2FFG784C Datasheet - Page 17

• Manufacturer Part Number: XC6VCX75T-2FFG784C
• Description: IC FPGA VIRTEX 6 74K 784FFGBGA
• Manufacturer: Xilinx Inc
• Series: Virtex™ 6 CXTr

Specifications of XC6VCX75T-2FFG784C

• Number Of Logic Elements/cells: 74496
• Number Of Labs/clbs: 5820
• Total Ram Bits: 5750784
• Number Of I /o: 360
• Voltage - Supply: 0.95 V ~ 1.05 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 784-BBGA, FCBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -

LVPECL DC Specifications (LVPECL_25)
These values are valid when driving a 100 differential load only, i.e., a 100 resistor between the two receiver pins. The
V
ranges.
Virtex-6 FPGA SelectIO Resources User Guide.
Table 19: LVPECL DC Specifications
eFUSE Read Endurance
Table 20
Configuration User Guide.
Table 20: eFUSE Read Endurance
GTX Transceiver Specifications
GTX Transceiver DC Characteristics
Table 21: Absolute Maximum Ratings for GTX Transceivers
DS153 (v1.6) February 11, 2011
Product Specification
Notes:
1.
2.
Notes:
1.
V
V
V
V
DNA_CYCLES
AES_CYCLES
MGTAVCC
MGTAVTT
MGTAVTTRCAL
V
V
OH
OH
OL
ICM
IDIFF
IN
MGTREFCLK
Symbol
Recommended input maximum voltage not to exceed V
Recommended input minimum voltage not to go below –0.5V.
Stresses beyond those listed under Absolute Maximum Ratings might cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those listed under Operating Conditions is not implied.
Exposure to Absolute Maximum Ratings conditions for extended periods of time might affect device reliability.
levels are 200 mV below standard LVPECL levels and are compatible with devices tolerant of lower common-mode
Symbol
Symbol
Table 19
lists the maximum number of read cycle operations expected. For more information, see the Virtex-6 FPGA
Output High Voltage
Output Low Voltage
Input Common-Mode Voltage
Differential Input Voltage
summarizes the DC output specifications of LVPECL. For more information on using LVPECL
Analog supply voltage for the GTX transmitter and receiver circuits relative to
GND
Analog supply voltage for the GTX transmitter and receiver termination
circuits relative to GND
Analog supply voltage for the resistor calibration circuit of the GTX
transceiver column
Receiver (RXP/RXN) and Transmitter (TXP/TXN) absolute input voltage
Reference clock absolute input voltage
Number of DNA_PORT READ operations or JTAG ISC_DNA read
command operations. Unaffected by SHIFT operations.
Number of JTAG FUSE_KEY or FUSE_CNTL read command
operations. Unaffected by SHIFT operations.
DC Parameter
(1)(2)
Description
Description
CCAUX
www.xilinx.com
+ 0.2V.
V
V
(1)
CC
CC
0.100
Min
0.6
– 1.025
– 1.81
-3
1.545
0.795
Typ
–
–
Virtex-6 CXT Family Data Sheet
Speed Grade
–0.5
–0.5
–0.5
–0.5
–0.5
-2
30,000,000
30,000,000
Min
V
V
-1
CC
CC
Max
Max
1.32
1.32
1.32
1.32
1.1
2.2
1.5
– 0.88
– 1.62
-1L
,
see the
Units
V
V
V
V
V
Cycles
Cycles
Units
Read
Units
Read
V
V
V
V
17