XC5VSX50T-1FF1136C Xilinx Inc, XC5VSX50T-1FF1136C Datasheet - Page 225
XC5VSX50T-1FF1136C
Manufacturer Part Number
XC5VSX50T-1FF1136C
Description
IC FPGA VIRTEX-5 50K 1136FBGA
Manufacturer
Xilinx Inc
Series
Virtex™-5 SXTr
Datasheets
1.XC5VLX30-1FFG324C.pdf
(91 pages)
2.XC5VLX30-1FFG324C.pdf
(13 pages)
3.XC5VLX30-1FFG324C.pdf
(385 pages)
Specifications of XC5VSX50T-1FF1136C
Number Of Logic Elements/cells
52224
Number Of Labs/clbs
4080
Total Ram Bits
4866048
Number Of I /o
480
Voltage - Supply
0.95 V ~ 1.05 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
1136-BBGA, FCBGA
Package
1136FCBGA
Family Name
Virtex®-5
Device Logic Units
52224
Typical Operating Supply Voltage
1 V
Maximum Number Of User I/os
480
Ram Bits
4866048
For Use With
HW-V5-ML506-UNI-G - EVALUATION PLATFORM VIRTEX-5HW-AFX-FF1136-500-G - BOARD DEV VIRTEX 5 FF1136
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Gates
-
Available stocks
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Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
XC5VSX50T-1FF1136C
Manufacturer:
Xilinx Inc
Quantity:
10 000
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Virtex-5 FPGA User Guide
UG190 (v5.3) May 17, 2010
Input Termination to V
Some I/O standards require an input termination to V
X-Ref Target - Figure 6-8
DCI can also provide input termination to V
resistance is set by the reference resistors. Both GTL and HSTL standards are controlled by
50 Ω reference resistors. The DCI I/O standards supporting single termination are:
GTL_DCI, GTLP_DCI, HSTL_III_DCI, HSTL_III_DCI_18, HSTL_IV_DCI, and
HSTL_IV_DCI_18.
Figure 6-9
X-Ref Target - Figure 6-9
illustrates DCI single termination inside a Virtex-5 device.
Figure 6-9: Input Termination Using DCI Single Termination
Figure 6-8: Input Termination to V
CCO
www.xilinx.com
(Single Termination)
Z
0
Z
0
R
V
CCO
IOB
Virtex-5 DCI
V
V
REF
CCO
REF
V
CCO
SelectIO Resources General Guidelines
R
using single termination. The termination
IOB
Virtex-5 FPGA
UG190_6_07_021206
CCO
UG190_c6_06_022609
CCO
(see
without DCI
Figure
6-8).
225
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