XC2VP40-7FGG676C Xilinx Inc, XC2VP40-7FGG676C Datasheet - Page 179
![IC FPGA VIRTEX-II PRO 676-FBGA](/photos/6/73/67300/b-676_sml.jpg)
XC2VP40-7FGG676C
Manufacturer Part Number
XC2VP40-7FGG676C
Description
IC FPGA VIRTEX-II PRO 676-FBGA
Manufacturer
Xilinx Inc
Series
Virtex™-II Pror
Datasheet
1.XC2VP20-5FGG676C.pdf
(430 pages)
Specifications of XC2VP40-7FGG676C
Number Of Logic Elements/cells
43632
Number Of Labs/clbs
4848
Total Ram Bits
3538944
Number Of I /o
416
Voltage - Supply
1.425 V ~ 1.575 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
676-BBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
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FF672 Flip-Chip Fine-Pitch BGA Package
As shown in
BGA package. Pins in each of these devices are the same, except for differences shown in the "No Connects" column.
Following this table are the
Table 8: FF672 — XC2VP2, XC2VP4, and XC2VP7
DS083 (v4.7) November 5, 2007
Product Specification
Bank
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R
Table
8, XC2VP2, XC2VP4, and XC2VP7 Virtex-II Pro devices are available in the FF672 flip-chip fine-pitch
IO_L03P_0/VREF_0
IO_L09P_0/VREF_0
IO_L45P_0/VREF_0
IO_L69P_0/VREF_0
IO_L01N_0/VRP_0
IO_L01P_0/VRN_0
IO_L05_0/No_Pair
Pin Description
FF672 Flip-Chip Fine-Pitch BGA Package Specifications (1.00mm
IO_L02N_0
IO_L02P_0
IO_L03N_0
IO_L06N_0
IO_L06P_0
IO_L07N_0
IO_L07P_0
IO_L08N_0
IO_L08P_0
IO_L09N_0
IO_L37N_0
IO_L37P_0
IO_L38N_0
IO_L38P_0
IO_L39N_0
IO_L39P_0
IO_L43N_0
IO_L43P_0
IO_L44N_0
IO_L44P_0
IO_L45N_0
IO_L67N_0
IO_L67P_0
IO_L68N_0
IO_L68P_0
IO_L69N_0
Virtex-II Pro and Virtex-II Pro X Platform FPGAs: Pinout Information
www.xilinx.com
Number
Pin
D21
C21
D20
D19
C19
G18
D18
C18
G17
H16
D17
G16
G15
D16
D15
C15
H15
H14
B24
A24
E20
F19
E19
E18
B19
A19
F18
F17
F16
E17
E16
F15
E15
XC2VP2
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
No Connects
XC2VP4
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
pitch).
XC2VP7
Module 4 of 4
51
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