XCV812E-7FG900C Xilinx Inc, XCV812E-7FG900C Datasheet - Page 99

• Manufacturer Part Number: XCV812E-7FG900C
• Description: IC FPGA 1.8V C-TEMP 900-FBGA
• Manufacturer: Xilinx Inc
• Series: Virtex™-E EMr

Specifications of XCV812E-7FG900C

• Number Of Logic Elements/cells: 21168
• Number Of Labs/clbs: 4704
• Total Ram Bits: 1146880
• Number Of I /o: 556
• Number Of Gates: 254016
• Voltage - Supply: 1.71 V ~ 1.89 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 900-BBGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

FG676 Differential Pin Pairs
Virtex-E Extended Memory devices have differential pin
pairs that can also provide other functions when not used as
a differential pair. A √ in the AO column indicates that the pin
pair can be used as an asynchronous output for all devices
provided in this package.
Pairs with a note number in the AO column are device
dependent. They can have asynchronous outputs if the pin
pair is in the same CLB row and column in the device. Num-
bers in this column refer to footnotes that indicate which
devices have pin pairs that can be asynchronous outputs.
The Other Functions column indicates alternative func-
tion(s) not available when the pair is used as a differential
pair or differential clock.
Table 4:
DS025-4 (v1.6) July 17, 2002
Pair
10
11
12
13
14
15
3
2
1
0
0
1
2
3
4
5
6
7
8
9
Total Pairs: 183, Asynchronous Output Pairs: 97
Bank
0
1
5
4
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R
FG676 Fine-Pitch BGA Differential Pin Pair
Summary — XCV405E
Global Differential Clock
AB13
AA14
G10
E13
C13
F10
E10
D10
F11
E11
Pin
G9
C5
E7
D7
C7
E9
D9
F7
F8
F9
P
IOLVDS
AC14
AF13
G11
B13
B10
C10
F14
Pin
C4
G8
D6
A4
B5
E8
A5
D8
B7
A7
B8
C9
A8
N
AO
NA
NA
NA
NA
NA
NA
NA
NA
NA
NA
NA
NA
NA
√
√
√
√
√
√
√
IO_DLL_L115P
IO_DLL_L21N
IO_DLL_L21P
IO_DLL_L115
Functions
Other
VREF
VREF
VREF
N
Virtex™-E 1.8 V Extended Memory Field Programmable Gate Arrays
-
-
-
-
-
-
-
-
-
-
-
-
-
www.xilinx.com
1-800-255-7778
Table 4:
Pair
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
Bank
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
2
2
2
2
2
FG676 Fine-Pitch BGA Differential Pin Pair
Summary — XCV405E
G16
G17
G21
D11
E12
C12
H13
A14
H14
C15
D15
D16
A17
E17
D17
C18
B19
E18
B20
C20
E19
D20
C21
E20
D21
E21
E23
E24
E25
F12
F14
F13
F15
F24
Pin
P
G12
G14
G15
G19
G18
G22
C11
A11
D12
A12
B13
E14
D14
C14
E15
C16
E16
C17
A18
C19
D18
D19
A21
B22
A23
C22
H20
H21
F16
F17
F18
F19
F22
F20
Pin
N
AO
NA
NA
NA
NA
NA
NA
NA
NA
NA
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
2
√
√
√
2
1
1
-
IO_LVDS_DLL
Functions
DIN, D0
Module 4 of 4
Other
VREF
VREF
VREF
VREF
VREF
VREF
VREF
VREF
CS
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
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