AT40K40LV-3EQC Atmel, AT40K40LV-3EQC Datasheet - Page 7

IC FPGA 3.3V 2304 CELL 240PQFP

AT40K40LV-3EQC

Manufacturer Part Number
AT40K40LV-3EQC
Description
IC FPGA 3.3V 2304 CELL 240PQFP
Manufacturer
Atmel
Series
AT40K/KLVr
Datasheet

Specifications of AT40K40LV-3EQC

Number Of Logic Elements/cells
2304
Total Ram Bits
18432
Number Of I /o
193
Number Of Gates
50000
Voltage - Supply
3 V ~ 3.6 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 70°C
Package / Case
240-BFQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Labs/clbs
-
Other names
AT40K40LV3EQC
The Cell
Figure 5 depicts the AT40K cell. Configuration bits for sep-
arate muxes and pass gates are independent. All permuta-
tions of programmable muxes and pass gates are legal. Vn
is connected to the vertical local bus in plane n. Hn is con-
Figure 5. The Cell
The core cell can be configured in several “modes”. The
core cell flexibility makes the AT40K architecture well
"1" NW NE SE SW
X
NW NE SE SW
8X1 LUT
X
Y
W = Bus Connection
Z
FB = Internal Feedback
OUT
X
= Bus Connection
= Diagonal Direct Connect or Bus
= Orthogonal Direct Connect or Bus
"0"
Z
"1"
1 0
"1"
W
D
Q
CLOCK
RESET/SET
N
"1"
E
8X1 LUT
N
OUT
Y
S
E
W
Y
S
W
"1"
FB
V1
H1
nected to the horizontal local bus in plane n. A local/local
turn in plane n is achieved by turning on the two pass gates
connected to Vn and Hn. Up to five simultaneous local/local
turns are possible.
suited to most digital design application areas
(see Figure 6).
Z
V2
H2
"1" OE
H
OE
V
X
V3
H3
AT40K
L
W
V4
H4
V5
H5
Y
7

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