XC5VLX50T-1FFG1136CES Xilinx Inc, XC5VLX50T-1FFG1136CES Datasheet - Page 219
![IC FPGA VIRTEX-5 ES 50K 1136FBGA](/photos/6/73/67306/xilinx-_1136-fbga_sml.jpg)
XC5VLX50T-1FFG1136CES
Manufacturer Part Number
XC5VLX50T-1FFG1136CES
Description
IC FPGA VIRTEX-5 ES 50K 1136FBGA
Manufacturer
Xilinx Inc
Series
Virtex™-5 LXTr
Datasheets
1.XC5VLX30-1FFG324C.pdf
(91 pages)
2.XC5VLX30-1FFG324C.pdf
(13 pages)
3.XC5VLX30-1FFG324C.pdf
(385 pages)
Specifications of XC5VLX50T-1FFG1136CES
Number Of Logic Elements/cells
46080
Number Of Labs/clbs
3600
Total Ram Bits
2211840
Number Of I /o
480
Voltage - Supply
0.95 V ~ 1.05 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
1136-BBGA, FCBGA
For Use With
HW-V5-ML561-UNI-G - EVALUATION PLATFORM VIRTEX-5HW-V5-ML550-UNI-G - EVALUATION PLATFORM VIRTEX-5HW-V5-ML521-UNI-G - EVALUATION PLATFORM VIRTEX-5HW-V5GBE-DK-UNI-G - KIT DEV V5 LXT GIGABIT ETHERNET122-1508 - EVALUATION PLATFORM VIRTEX-5
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
XC5VLX50T-1FFG1136CES
Manufacturer:
Xilinx Inc
Quantity:
10 000
- XC5VLX30-1FFG324C PDF datasheet
- XC5VLX30-1FFG324C PDF datasheet #2
- XC5VLX30-1FFG324C PDF datasheet #3
- XC5VLX30T-1FFG665C_PRODUCT_CHANGE PDF datasheet #4
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- Download datasheet (14Mb)
Virtex-5 FPGA User Guide
UG190 (v5.3) May 17, 2010
Reference Voltage (V
Output Drive Source Voltage (V
depends upon the device size, and in larger devices, there are additional full-sized banks in
the center column. In the Virtex-5 Family Overview the total number of I/O banks is listed
by device type. The XC5VLX30 has 12 usable I/O banks and one configuration bank.
Figure 6-3
X-Ref Target - Figure 6-3
Low-voltage, single-ended I/O standards with a differential amplifier input buffer require
an input reference voltage (V
each I/O bank, one of every 20 I/O pins is automatically configured as a V
using a single-ended I/O standard that requires a differential amplifier input buffer.
Many of the low-voltage I/O standards supported by Virtex-5 devices require a different
output drive voltage (V
source voltages.
Output buffers within a given V
voltage. The following input buffers use the V
and other DCI standards.
is an example of a columnar floorplan showing the XC5VLX30 I/O banks.
Figure 6-3: Virtex-5 FPGA XC5VLX30 I/O Banks
REF
CCO
BANK
40 I/O
) Pins
BANK
40 I/O
BANK
40 I/O
BANK
40 I/O
www.xilinx.com
). As a result, each device often supports multiple output drive
REF
CCO
). V
CCO
REF
bank must share the same output drive source
) Pins
is an external input into Virtex-5 devices. Within
CONFIG
BANK
20 I/O
BANK
20 I/O
BANK
20 I/O
BANK
20 I/O
CCO
SelectIO Resources General Guidelines
voltage: LVTTL, LVCMOS, PCI, LVDCI
ug190_6_03_021306
BANK
40 I/O
BANK
40 I/O
BANK
40 I/O
BANK
40 I/O
REF
input, if
219
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