101-0599 Rabbit Semiconductor, 101-0599 Datasheet - Page 83

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101-0599

Manufacturer Part Number
101-0599
Description
COMPUTER SNGLBD BL2500 512K FLSH
Manufacturer
Rabbit Semiconductor
Datasheet

Specifications of 101-0599

Module/board Type
Single Board Computer Module
For Use With/related Products
BL2500
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
B.2.1 Power to VRAM Switch
The VRAM switch on the Coyote’s RabbitCore module, shown in Figure B-2, allows the
battery backup to provide power when the external power goes off. The switch provides
an isolation between Vcc and the battery when Vcc goes low. This prevents the Vcc line
from draining the battery.
Figure B-2. VRAM Switch
The field-effect transistor provides a very small voltage drop between Vcc and VRAM
(<100 mV, typically 10 mV) so that the board components powered by Vcc will not have a
significantly different voltage than VRAM.
When the Coyote is not in reset, the
line will be high. This allows VRAM to
RESOUT
nearly equal Vcc.
When the Coyote is in reset, the
RESOUT
line will go low. This provides an isolation
between Vcc and VRAM.
B.2.2 Reset Generator
The Coyote’s RabbitCore module uses a reset generator to reset the Rabbit 3000 micro-
processor when the voltage drops below the voltage necessary for reliable operation. The
reset typically occurs at 2.93 V (2.63 V for the BL2510).
B.3 Chip Select Circuit
The current drain on the battery in a battery-backed circuit must be kept at a minimum.
When the Coyote is not powered, the battery keeps the SRAM memory contents and the
real-time clock (RTC) going. The SRAM has a powerdown mode that greatly reduces
power consumption. This powerdown mode is activated by raising the chip select (CS)
signal line. Normally the SRAM requires Vcc to operate. However, only 2 V is required
for data retention in powerdown mode. Thus, when power is removed from the circuit, the
battery voltage needs to be provided to both the SRAM power pin and to the CS signal
line. The CS control circuit accomplishes this task for the SRAM’s chip select signal line.
User’s Manual
77

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