CY8CTST200-16LGXI Cypress Semiconductor Corp, CY8CTST200-16LGXI Datasheet - Page 21
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CY8CTST200-16LGXI
Manufacturer Part Number
CY8CTST200-16LGXI
Description
IC MCU 32K FLASH 16-QFN
Manufacturer
Cypress Semiconductor Corp
Series
TrueTouch™r
Datasheet
1.CY8CTST200-16LGXI.pdf
(308 pages)
Specifications of CY8CTST200-16LGXI
Applications
Touchscreen Controller
Core Processor
M8C
Program Memory Type
FLASH (32 kB)
Controller Series
CY8CT
Ram Size
2K x 8
Interface
I²C, SPI, UART/USART, USB
Number Of I /o
13
Voltage - Supply
1.8 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
16-QFN
For Use With
770-1000 - ISP 4PORT FOR CYPRESS PSOC MCU
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
428-2973
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
CY8CTST200-16LGXI
Manufacturer:
CY
Quantity:
1 300
Part Number:
CY8CTST200-16LGXI
Manufacturer:
CYPRESS/赛普拉斯
Quantity:
20 000
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1.1.3
Table 1-3. 32-Pin QFN Part Pinout **
PSoC CY8CTMG20x and CY8CTST200 TRM, Document No. 001-53603 Rev. *C
LEGEND A = Analog, I = Input, O = Output, NC = No Connection, H = 5 mA High Output Drive, R = Regulated Output Option.
Pin
No.
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
1
2
3
4
5
6
7
8
9
IOHR
IOHR
IOHR
IOHR
IOHR
IOHR
IOHR
IOHR
IOH
IOH
IOH
IOH
IOH
IOH
IOH
IOH
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
Power
Power
Power
Input
* ISSP pin which is not High Z at POR (Power On Reset).
** The center pad on the QFN package must be connected to ground (Vss) for best mechanical, thermal, and electrical performance. If not
connected to ground, it must be electrically floated and not connected to any other signal.
CY8CTMG200-32LQXI, CY8CTMG200A-32LQXI, CY8CTST200-32LQXI,
CY8CTST200A-32LQXI, CY8CTMG201-32LQXI, CY8CTMG201A-32LQXI PSoC
32-Pin Part Pinout
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
P0[1]
P2[7]
P2[5]
P2[3]
P2[1]
P3[3]
P3[1]
P1[7]
P1[5]
P1[3]
P1[1]
Vss
P1[0]
P1[2]
P1[4]
P1[6]
XRES
P3[0]
P3[2]
P2[0]
P2[2]
P2[4]
P2[6]
P0[0]
P0[2]
P0[4]
P0[6]
Vdd
P0[7]
P0[5]
P0[3]
Vss
Name
Integrating input
XTAL Out
XTAL In
I2C SCL, SPI SS
I2C SDA, SPI MISO
SPI CLK
TC CLK*, I2C SCL, SPI MOSI
Ground pin
TC DATA*, I2C SDA, SPI CLK
EXTCLK
Active high external reset with internal pull down
Power pin
Ground pin
Description
CY8CTMG201-32LQXI, CY8CTMG201A-32LQXI PSoC
CY8CTMG200-32LQXI, CY8CTMG200A-32LQXI,
CY8CTST200-32LQXI, CY8CTST200A-32LQXI,
P3[1]
P0[1]
P2[7]
P2[5]
P2[3]
P2[1]
P3[3]
P1[7]
1
2
3
5
6
7
8
4
(Top View)
Devices
QFN
22
24
23
21
20
19
18
17
P0[0]
P2[6]
P2[4]
P2[2]
P2[0]
P3[2]
P3[0]
XRES
Pin Information
[+] Feedback
21
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