SL811HST-AXC Cypress Semiconductor Corp, SL811HST-AXC Datasheet - Page 28

• Manufacturer Part Number: SL811HST-AXC
• Description: IC USB HOST/SLAVE CTRLR 48LQFP
• Manufacturer: Cypress Semiconductor Corp

Specifications of SL811HST-AXC

• Package / Case: 48-LQFP
• Applications: USB Host/Slave Controller
• Controller Series: USB-Hosts
• Ram Size: 256 x 8
• Interface: USB
• Number Of I /o: 8
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: 0°C ~ 65°C
• Mounting Type: Surface Mount
• Operating Supply Voltage: 3 V
• Supply Current (max): 25 mA
• Maximum Operating Temperature: + 65 C
• Minimum Operating Temperature: 0 C
• Mounting Style: SMD/SMT
• Core Size: 8 Bit
• Ram Memory Size: 256Byte
• Cpu Speed: 48MHz
• Embedded Interface Type: I2C, USB
• Digital Ic Case Style: TQFP
• Supply Voltage Range: 3V To 3.45V
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: CY3662 - KIT DEVELOPMENT EZ-811HS
• Core Processor: -
• Program Memory Type: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 428-1721; SL811HST-AXC

Document 38-08008 Rev. *D
DMA Write Cycle
Note nWR must go low after nDACK goes low in order for nDRQ to clear. If this sequence is not implemented as requested, the
next nDRQ is not inserted.
tdack
tdwrlo
tdakrq
tdwrp
tdhld
tdsu
tackrq
tackwrh
twrcycle
Parameter
nD A C K
n D R Q
D 0-D 7
n W R
nDACK low
nDACK to nWR low delay
nDACK low to nDRQ high delay
nWR pulse width
Data hold after nWR high
Data set-up to nWR strobe low
NDACK high to nDRQ low
NDACK high to nDRQ low
DMA Write Cycle Time
Description
SL811 D M A W R IT E C Y C LE TIM IN G
tdsu
DMA Write Cycle
tdakrq
150 ns
tdw rlo
80 ns
65 ns
60 ns
Min.
5 ns
5 ns
5 ns
5 ns
5 ns
tdack
tdw rp
D AT A
tackrq
Typ.
tdhld
tackw rh
SL811HS
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