XE8802MI035LF Semtech, XE8802MI035LF Datasheet - Page 56

• Manufacturer Part Number: XE8802MI035LF
• Description: IC DAS 16BIT FLASH 8K 100-LQFP
• Manufacturer: Semtech

Specifications of XE8802MI035LF

• Applications: Sensing Machine
• Core Processor: RISC
• Program Memory Type: FLASH (22 kB)
• Controller Series: XE8000
• Ram Size: 1K x 8
• Interface: SPI, UART
• Number Of I /o: 36
• Voltage - Supply: 2.4 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 100-LQFP
• For Use With: XE8000MP - PROG BOARD AND PROSTART2 CARD
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

The next table summarizes the different clock configurations of the circuit:
Note 1: The frequency of the RC must be higher than 100 kHz when Xtal is enabled in order to ensure a proper 32
kHz operation.
Note 2: The clock RC can be divided by the value of freq instruction (see coolrisc instruction information)
Note 3: Switching from one clock source to another and stopping the unused clock source must be performed
using 2 MOVE instructions to RegSysClock. First select the new clock source and then stop the unused one.
7.9
The clock generator block embeds two divider chains: the high prescaler and the low one.
The high prescaler is made of an 8 stage dividing chain and the low prescaler of a 15 stage dividing chain.
Features:
© Semtech 2006
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High prescaler can only be driven with RC clock or external clock (bits EnableRc or EnExtClock have to be
Low prescaler can be driven from the high prescaler or directly with the Xtal clock when bit EnableXtal is set to
Bit ClearLowPrescal in the RegSysPre0 register allows to reset synchronously the low prescaler, the low
Bit ColdXtal=1 indicates the Xtal is in its start phase. It is active for 32768 Xtal cycles after setting EnableXtal.
set, see Table 7-13).
1 and bit EnExtClock is set to 0.
prescaler is also automatically cleared when bit EnableXtal is set. Both dividing chains are reset
asynchronously by the nresetglobal signal.
Prescalers
freq instruction
nodiv
div2
div4
div8
div16
Mode
name
Sleep
Xtal
RC
RC + Xtal
External
Clock Sources
0
0
0
0
1
cpuck
RC or external
RC/2 or external/2
RC/4 or external/4
RC/8 or external/8
RC/16 or external/16
X
0
0
1
1
Table 7-13: Table of clocking modes.
XE8802 Sensing Machine Data Acquisition MCU
X
0
1
0
1
CpuSel=0
RC
External
RC
NOTE 1 and 2
Xtal
off
NOTE 2
2
7-9
NOTE
Cpuck
with ZoomingADC™ and LCD driver
CpuSel=1
High presc.
High presc.
Xtal
Xtal
off
Clock targets
Prescaler
RC
External
Clock
input
High
RC
off
off
NOTE 1
High presc.
High presc.
Prescaler
Clock
input
Low
Xtal
Xtal
off
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