ATAM862P-TNSY4D Atmel, ATAM862P-TNSY4D Datasheet - Page 90
![IC MCU FLASH 4K TX 433MHZ 24SSOP](/photos/6/76/67636/453-24-ssop_sml.jpg)
ATAM862P-TNSY4D
Manufacturer Part Number
ATAM862P-TNSY4D
Description
IC MCU FLASH 4K TX 433MHZ 24SSOP
Manufacturer
Atmel
Datasheet
1.ATAM862P-TNQY4D.pdf
(110 pages)
Specifications of ATAM862P-TNSY4D
Applications
UHF ASK/FSK
Core Processor
MARC4
Program Memory Type
FLASH (4 kB)
Controller Series
MARC4 4-Bit
Ram Size
256 x 4
Interface
SSI
Number Of I /o
11
Voltage - Supply
1.8 V ~ 4 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
24-SSOP
Processor Series
ATAM862x
Core
MARC4
Data Bus Width
4 bit
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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24.2.4
90
ATAM862-4
Combination Mode 9: Biphase Demodulation
SSI mode 1:
Timer 3 mode 11:
In the Biphase demodulation mode the timer works like in the Manchester demodulation mode.
The difference is that the bits are decoded with the toggle flip-flop. This flip-flop samples the
edge in the middle of the bitframe and the compare register 1 match event shifts the toggle
flip-flop output into shift register. Before activating the demodulation the timer and the demodula-
tion stage must be synchronized with the bitstream. The Biphase code timing consists of parts
with the half bitlength and the complete bitlength. The synchronization routine must start the
demodulator after an interval with the complete bitlength.
The counter can be driven by any internal clock source and the output T3O can be used by
Timer 2 in this mode.
Figure 24-11. Biphase Demodulation
CM31=SCI
SR-DATA
Counter 3
Timer 3
Q1=SI
mode
T3EX
Reset
T3I
Synchronize
8-bit shift register internal data input (SI) and the internal shift clock
(SCI) from the Timer 3
Biphase demodulation with Timer 3
0
0
Bit 7
0
1
Bit 6
1
1
Biphase demodulation mode
Bit 5
1
0
Bit 4
0
1
Bit 3
1
0
Bit 2
0
1
Bit 1
4551G–4BMCU–07/07
1
0
Bit 0
0
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