CY8C20636A-24LTXI Cypress Semiconductor Corp, CY8C20636A-24LTXI Datasheet - Page 20
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CY8C20636A-24LTXI
Manufacturer Part Number
CY8C20636A-24LTXI
Description
MCU 8K FLASH 1K SRAM 48VQFN
Manufacturer
Cypress Semiconductor Corp
Series
CapSense® Controllersr
Specifications of CY8C20636A-24LTXI
Program Memory Type
FLASH (8 kB)
Package / Case
48-VQFN Exposed Pad, 48-HVQFN, 48-SQFN, 48-DHVQFN
Applications
Capacitive Sensing
Core Processor
M8C
Controller Series
CY8C20xx6A
Ram Size
1K x 8
Interface
I²C, SPI
Number Of I /o
36
Voltage - Supply
1.71 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Processor Series
CY8C20x36A
Core
M8C
Data Ram Size
1 KB
Interface Type
I2C, SPI
Maximum Clock Frequency
400 KHz
Number Of Programmable I/os
36
Number Of Timers
3
Operating Supply Voltage
1.71 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Development Tools By Supplier
CY3280-20X66
Minimum Operating Temperature
- 40 C
Program Memory Size
8 KB
Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Application
CapSense
Processing Unit
Microprocessor
Operating Supply Voltage (min)
1.71V
Operating Supply Voltage (typ)
1.8/2.5/3.3/5V
Operating Supply Voltage (max)
5.5V
Package Type
QFN EP
Pin Count
48
Mounting
Surface Mount
Rad Hardened
No
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
770-1000 - ISP 4PORT FOR CYPRESS PSOC MCU
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
CY8C20636A-24LTXI
Manufacturer:
CY
Quantity:
110
Part Number:
CY8C20636A-24LTXI
Manufacturer:
CYPRESS/赛普拉斯
Quantity:
20 000
DC Chip-Level Specifications
The following table lists guaranteed maximum and minimum specifications for the entire voltage and temperature ranges.
Table 14. DC Chip-Level Specifications
Document Number: 001-54459 Rev. *B
Note
Vdd
I
I
I
I
I
DD24
DD12
DD6
SB0
SB1
5. When Vdd remains in the range from 1.71V to 1.9V for more than 50 µsec, the slew rate when moving from the 1.71V to 1.9V range to greater than 2V must be
6. If powering down in standby sleep mode, to properly detect and recover from a VDD brown out condition any of the following actions must be taken:
Symbol
❐ Bring the device out of sleep before powering down.
❐ Assure that VDD falls below 100 mV before powering back up.
❐ Set the No Buzz bit in the OSC_CR0 register to keep the voltage monitoring circuit powered during sleep.
❐ Increase the buzz rate to assure that the falling edge of VDD is captured. The rate is configured through the PSSDC bits in the SLP_CFG register.
slower than 1V/500 usec to avoid triggering POR. The only other restriction on slew rates for any other voltage range or transition is the SR
For the referenced registers, refer to the CY8C20x36 Technical Reference Manual. In deep sleep mode, additional low power voltage monitoring circuitry allows
V
[5, 6]
DD
brown out conditions to be detected for edge rates slower than 1V/ms.
Supply Voltage
Supply Current, IMO = 24 MHz
Supply Current, IMO = 12 MHz
Supply Current, IMO = 6 MHz
Deep Sleep Current
Standby Current with POR, LVD and
Sleep Timer
Description
Refer the table
Specifications on page 25
Conditions are Vdd ≤ 3.0V, T
CPU = 24 MHz. CapSense running at 12
MHz, no I/O sourcing current
Conditions are Vdd ≤ 3.0V, T
CPU = 12 MHz. CapSense running at 12
MHz, no I/O sourcing current
Conditions are Vdd ≤ 3.0V, T
CPU = 6 MHz. CapSense running at 6 MHz,
no I/O sourcing current
Vdd ≤ 3.0V, T
off
Vdd ≤ 3.0V, T
off
A
A
= 25°C, I/O regulator turned
= 25°C, I/O regulator turned
DC POR and LVD
Conditions
A
A
A
= 25°C,
= 25°C,
= 25°C,
CY8C20X36A/46A/66A/96A
1.71
Min
–
–
–
–
–
2.88
1.71
1.16
1.07
Typ
0.1
–
POWER_UP
Max
5.5
4.0
2.6
1.8
1.5
Page 20 of 39
–
parameter.
Units
mA
mA
mA
μA
μA
V
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