AT43USB320A-AC Atmel, AT43USB320A-AC Datasheet - Page 36

• Manufacturer Part Number: AT43USB320A-AC
• Description: IC USB MCU EMBED HUB AVR 100LQFP
• Manufacturer: Atmel
• Series: AVR®r

Specifications of AT43USB320A-AC

• Applications: USB Hub/Microcontroller
• Core Processor: AVR
• Controller Series: AT43USB
• Ram Size: 512 x 8
• Interface: SPI Serial, USB, UART
• Number Of I /o: 32
• Voltage - Supply: 4.4 V ~ 5.25 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 100-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Program Memory Type: -

AVR Register Set
Status Register and Stack Pointer
36
AT43USB320A
Status Register – SREG
• Bit 7 – I: Global Interrupt Enable
The global interrupt enable bit must be set (one) for the interrupts to be enabled. The individ-
ual interrupt enable control is then performed in separate control registers. If the global
interrupt enable bit is cleared (zero), none of the interrupts are enabled independent of the
individual interrupt enable settings. The I-bit is cleared by the hardware after an interrupt has
occurred, and is set by the RETI instruction to enable subsequent interrupts.
• Bit 6 – T: Bit Copy Storage
The bit copy instructions BLD (Bit LoaD) and BST (Bit STore) use the T bit as source and des-
tination for the operated bit. A bit from a register in the register file can be copied into T by the
BST instruction, and a bit in T can be copied into a bit in a register in the register file by the
BLD instruction.
• Bit 5 – H: Half Carry Flag
The half carry flag H indicates a half carry in some arithmetic operations. See the Instruction
Set Description for detailed information.
• Bit 4 – S: Sign Bit, S = N⊕V
The S-bit is always an exclusive or between the negative flag N and the two's complement
overflow flag V. See the Instruction Set Description for detailed information.
• Bit 3 – V: Two's Complement Overflow Flag
The two's complement overflow flag V supports two's complement arithmetics. See the
Instruction Set Description for detailed information.
• Bit 2 – N: Negative Flag
The negative flag N indicates a negative result after the different arithmetic and logic opera-
tions. See the Instruction Set Description for detailed information.
• Bit 1 – Z: Zero Flag
The zero flag Z indicates a zero result after the different arithmetic and logic operations. See
the Instruction Set Description for detailed information.
• Bit 0 – C: Carry Flag
The carry flag C indicates a carry in an arithmetic or logic operation. See the Instruction Set
Description for detailed information.
Note that the status register is not automatically stored when entering an interrupt routine and
restored when returning from an interrupt routine. This must be handled by software.
Read/Write
Initial Value
$3F ($5F)
Bit
R/W
7
0
I
R/W
T
6
0
R/W
H
5
0
R/W
4
S
0
R/W
V
3
0
R/W
N
2
0
R/W
1
Z
0
R/W
1443E–USB–4/04
C
0
0
SREG