AN2131QC Cypress Semiconductor Corp, AN2131QC Datasheet - Page 122

• Manufacturer Part Number: AN2131QC
• Description: IC MCU 8051 8K RAM 24MHZ 80BQFP
• Manufacturer: Cypress Semiconductor Corp
• Series: EZ-USB®r

Specifications of AN2131QC

• Applications: USB Microcontroller
• Core Processor: 8051
• Program Memory Type: ROMless
• Controller Series: AN213x
• Ram Size: 8K x 8
• Interface: I²C, USB
• Number Of I /o: 24
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 80-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 428-1307

Endpoint Zero has special significance in a USB system. It is a CONTROL endpoint, and
is required by every USB device. Only CONTROL endpoints accept special SETUP
tokens that the host uses to signal transfers that deal with device control. The USB host
sends a repertoire of standard device requests over endpoint zero. These standard requests
are fully defined in Chapter 9 of the USB Specification. This chapter describes how the
EZ-USB chip handles endpoint zero requests.
Because the EZ-USB chip can enumerate without firmware (see Chapter 5, "EZ-USB
Enumeration and ReNumeration "), the EZ-USB core contains logic to perform enumer-
ation on its own. This hardware assist of endpoint zero operations is make available to the
8051, simplifying the code required to service device requests. This chapter deals with
8051 control of endpoint zero (ReNum=1, Chapter 5), and describes EZ-USB resources
such as the Setup Data Pointer that simplify 8051 code that handles endpoint zero
requests.
Endpoint zero is the only CONTROL endpoint in the EZ-USB chip. Although CON-
TROL endpoints are bi-directional, the EZ-USB chip provides two 64-byte buffers,
IN0BUF and OUT0BUF, which the 8051 handles exactly like bulk endpoint buffers for
the data stages of a CONTROL transfer. A second 8-byte buffer, SETUPDAT, which is
unique to endpoint zero, holds data that arrives in the SETUP stage of a CONTROL trans-
fer. This relieves the 8051 programmer of having to keep track of the three CONTROL
transfer phases—SETUP, DATA, and STATUS. The EZ-USB core also generates separate
interrupt requests for the various transfer phases, further simplifying code.
The IN0BUF and OUT0BUF buffers have two special properties that result from being
used by CONTROL endpoint zero:
EZ-USB TRM v1.9
7.1
•
•
Endpoints 0-IN and 0-OUT are always valid, so the valid bits (LSB of IN07VAL
and OUT07VAL registers) are permanently set to 1. Writing any value to these
two bits has no effect, and reading these bits always returns a 1.
Endpoint 0 cannot be paired with endpoint 1, so there is no pairing bit in the USB-
PAIR register for endpoint 0 or 1.
Introduction
7 EZ-USB Endpoint Zero
Chapter 7. EZ-USB CPU
Page 7-1