PIC16F54-I/SS Microchip Technology, PIC16F54-I/SS Datasheet - Page 18

IC MCU FLASH 512X12 20SSOP

PIC16F54-I/SS

Manufacturer Part Number
PIC16F54-I/SS
Description
IC MCU FLASH 512X12 20SSOP
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets

Specifications of PIC16F54-I/SS

Core Size
8-Bit
Program Memory Size
768B (512 x 12)
Core Processor
PIC
Speed
20MHz
Peripherals
POR, WDT
Number Of I /o
12
Program Memory Type
FLASH
Ram Size
25 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
20-SSOP
Controller Family/series
PIC16F
No. Of I/o's
12
Ram Memory Size
25Byte
Cpu Speed
20MHz
No. Of Timers
1
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC164307 - MODULE SKT FOR PM3 28SSOPAC164014 - MODULE SKT PROMATEII 44PQFP
Eeprom Size
-
Data Converters
-
Connectivity
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC16F54-I/SS
Manufacturer:
MIC
Quantity:
20 000
PIC16F5X
3.3
This register contains the arithmetic status of the ALU,
the Reset status and the page preselect bits for
program memories larger than 512 words.
The Status register can be the destination for any
instruction, as with any other register. If the Status
register is the destination for an instruction that affects
the Z, DC or C bits, then the write to these three bits is
disabled. These bits are set or cleared according to the
device logic. Furthermore, the TO and PD bits are not
writable. Therefore, the result of an instruction with the
Status register as destination may be different than
intended.
REGISTER 3-1:
DS41213B-page 16
Status Register
bit 7
bit 6-5
bit 4
bit 3
bit 2
bit 1
bit 0
STATUS REGISTER (ADDRESS: 03h)
PA2: Reserved, do not use.
Use of the PA2 bit as a general purpose read/write bit is not recommended, since this may
affect upward compatibility with future products.
PA<1:0>: Program Page Preselect bits (PIC16F57)
00 = Page 0 (000h - 1FFh)
01 = Page 1 (200h - 3FFh)
10 = Page 2 (400h - 5FFh)
11 = Page 3 (600h - 7FFh)
Each page is 512 words.
Using the PA<1:0> bits as general purpose read/write bits in devices which do not use them for
program page preselect is not recommended since this may affect upward compatibility with
future products.
TO: Time-out bit
1 = After power-up, CLRWDT instruction or SLEEP instruction
0 = A WDT time-out occurred
PD: Power-down bit
1 = After power-up or by the CLRWDT instruction
0 = By execution of the SLEEP instruction
Z: Zero bit
1 = The result of an arithmetic or logic operation is zero
0 = The result of an arithmetic or logic operation is not zero
DC: Digit carry/borrow bit (for ADDWF and SUBWF instructions)
ADDWF:
1 = A carry from the 4th low order bit of the result occurred
0 = A carry from the 4th low order bit of the result did not occur
SUBWF:
1 = A borrow from the 4th low order bit of the result did not occur
0 = A borrow from the 4th low order bit of the result occurred
C: Carry/borrow bit (for ADDWF, SUBWF and RRF, RLF instructions)
ADDWF:
1 = A carry occurred
0 = A carry did not occur 0 = A borrow occurred
bit 7
Legend:
R = Readable bit
-n = Value at POR
R/W-0
PA2
R/W-0
PA1
R/W-0
SUBWF:
1 = A borrow did not occur Loaded with LSb or MSb, respectively
PA0
Preliminary
W = Writable bit
‘1’ = Bit is set
R-1
TO
For example, CLRF STATUS, will clear the upper three
bits and set the Z bit. This leaves the Status register as
000u u1uu (where u = unchanged).
It is recommended, therefore, that only BCF, BSF,
MOVWF and SWAPF instructions be used to alter the
Status register because these instructions do not affect
the Z, DC or C bits from the Status register. For other
instructions
Section 9.0 “Instruction Set Summary”.
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
R-1
PD
which
RRF or RLF:
do
R/W-x
 2004 Microchip Technology Inc.
Z
affect
x = Bit is unknown
R/W-x
Status
DC
bits,
R/W-x
C
bit 0
see

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