PIC16F54-I/SS Microchip Technology, PIC16F54-I/SS Datasheet - Page 20

• Manufacturer Part Number: PIC16F54-I/SS
• Description: IC MCU FLASH 512X12 20SSOP
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16F54-I/SS

• Core Size: 8-Bit
• Program Memory Size: 768B (512 x 12)
• Core Processor: PIC
• Speed: 20MHz
• Peripherals: POR, WDT
• Number Of I /o: 12
• Program Memory Type: FLASH
• Ram Size: 25 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 20-SSOP
• Controller Family/series: PIC16F
• No. Of I/o's: 12
• Ram Memory Size: 25Byte
• Cpu Speed: 20MHz
• No. Of Timers: 1
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC164307 - MODULE SKT FOR PM3 28SSOPAC164014 - MODULE SKT PROMATEII 44PQFP
• Eeprom Size: -
• Data Converters: -
• Connectivity: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

PIC16F5X
3.5
As a program instruction is executed, the Program
Counter (PC) will contain the address of the next
program instruction to be executed. The PC value is
increased by one, every instruction cycle, unless an
instruction changes the PC.
For a GOTO instruction, bits 8:0 of the PC are provided by
the GOTO instruction word. The Program Counter (PCL)
is mapped to PC<7:0> (Figure 3-5 and Figure 3-6).
For the PIC16F57, a page number must be supplied as
well. Bit 5 and bit 6 of the Status register provide page
information to bit 9 and bit 10 of the PC (Figure 3-5 and
Figure 3-6).
For a CALL instruction or any instruction where the PCL
is the destination, bits 7:0 of the PC again are provided
by the instruction word. However, PC<8> does not
come from the instruction word, but is always cleared
(Figure 3-5 and Figure 3-6).
Instructions where the PCL is the destination or modify
PCL instructions, include MOVWF PCL, ADDWF PCL,
and BSF PCL,5.
For the PIC16F57, a page number again must be sup-
plied. Bit 5 and bit 6 of the Status register provide page
information to bit 9 and bit 10 of the PC (Figure 3-5 and
Figure 3-6).
FIGURE 3-5:
DS41213B-page 18
GOTO Instruction
CALL or Modify PCL Instruction
Note:
Reset to ‘0’
Program Counter
PC
PC
Because PC<8> is cleared in the CALL
instruction or any modify PCL instruction,
all subroutine calls or computed jumps are
limited to the first 256 locations of any
program memory page (512 words long).
8 7
8 7
Instruction Word
Instruction Word
LOADING OF PC
BRANCH INSTRUCTIONS –
PIC16F54
PCL
PCL
0
0
Preliminary
FIGURE 3-6:
3.5.1
If the Program Counter is pointing to the last address of
a selected memory page, when it increments, it will
cause the program to continue in the next higher page.
However, the page preselect bits in the Status register
will not be updated. Therefore, the next GOTO, CALL or
modify PCL instruction will send the program to the
page specified by the page preselect bits (PA0 or
PA<1:0>).
For example, a NOP at location 1FFh (page 0)
increments the PC to 200h (page 1). A GOTO xxx at
200h will return the program to address xxh on page 0
(assuming that PA<1:0> are clear).
To prevent this, the page preselect bits must be
updated under program control.
3.5.2
The program counter is set upon a Reset, which means
that the PC addresses the last location in the last page
(i.e., the Reset vector).
The Status register page preselect bits are cleared upon
a Reset, which means that page 0 is preselected.
Therefore, upon a Reset, a GOTO instruction at the
Reset vector location will automatically cause the
program to jump to page 0.
CALL or Modify PCL Instruction
GOTO Instruction
PC
PC
7
PAGING CONSIDERATIONS –
PIC16F57
EFFECTS OF RESET
7
10
2
10
2
9
9
PA<1:0>
Status
Status
PA<1:0>
Reset to ‘0’
8 7
8 7
LOADING OF PC
BRANCH INSTRUCTIONS –
PIC16F57
 2004 Microchip Technology Inc.
Instruction Word
Instruction Word
PCL
0
PCL
0
0
0