MPC852TCVR50A Freescale Semiconductor, MPC852TCVR50A Datasheet - Page 18

IC MPU POWERQUICC 50MHZ 256PBGA

MPC852TCVR50A

Manufacturer Part Number
MPC852TCVR50A
Description
IC MPU POWERQUICC 50MHZ 256PBGA
Manufacturer
Freescale Semiconductor
Series
PowerQUICC Ir
Datasheet

Specifications of MPC852TCVR50A

Processor Type
MPC8xx PowerQUICC 32-Bit
Speed
50MHz
Voltage
1.8V
Mounting Type
Surface Mount
Package / Case
256-PBGA
Family Name
MPC8xx
Device Core
PowerQUICC
Device Core Size
32b
Frequency (max)
50MHz
Instruction Set Architecture
RISC
Supply Voltage 1 (typ)
1.8/3.3V
Operating Supply Voltage (max)
1.9/3.465V
Operating Supply Voltage (min)
1.7/3.135V
Operating Temp Range
-40C to 100C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
256
Package Type
BGA
Core Size
32 Bit
Program Memory Size
8KB
Cpu Speed
50MHz
Embedded Interface Type
SPI, UART
Digital Ic Case Style
BGA
No. Of Pins
256
Supply Voltage Range
1.7V To 1.9V
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
Compliant

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Part Number:
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Part Number:
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Bus Signal Timing
18
B29b
B29d
B29e
B29g
B29h
B30a
Num
B29c
B29f
B29i
B30
CS negated to D(0:31), DP(0:3), High Z
GPCM write access, ACS = 00,
TRLX = 0,1 and CSNT = 0
(MIN = 0.25 × B1 – 2.00)
CS negated to D(0:31), DP(0:3) High-Z
GPCM write access, TRLX = 0, CSNT = 1,
ACS = 10, or ACS = 11 EBDF = 0
(MIN = 0.50 × B1 – 2.00)
WE(0:3)/BS_B[0:3] negated to D(0:31),
DP(0:3) High-Z GPCM write access, TRLX
= 1, CSNT = 1, EBDF = 0
(MIN = 1.50 × B1 – 2.00)
CS negated to D(0:31), DP(0:3) High-Z
GPCM write access, TRLX = 1, CSNT = 1,
ACS = 10, or ACS = 11 EBDF = 0
(MIN = 1.50 × B1 – 2.00)
WE(0:3/BS_B[0:3]) negated to D(0:31),
DP(0:3) High Z GPCM write access,
TRLX = 0, CSNT = 1, EBDF = 1
(MIN = 0.375 × B1 – 6.30)
CS negated to D(0:31), DP(0:3) High-Z
GPCM write access, TRLX = 0, CSNT = 1
ACS = 10 or ACS = 11, EBDF = 1
(MIN = 0.375 × B1 – 6.30)
WE(0:3)/BS_B[0:3] negated to D(0:31),
DP(0:3) High Z GPCM write access,
TRLX = 1, CSNT = 1, EBDF = 1
(MIN = 0.375 × B1 – 3.30)
CS negated to D(0:31), DP(0:3) High-Z
GPCM write access, TRLX = 1, CSNT = 1,
ACS = 10 or ACS = 11, EBDF = 1
(MIN = 0.375 × B1 – 3.30)
CS, WE(0:3)/BS_B[0:3] negated to
A(0:31), BADDR(28:30) Invalid GPCM
write access
WE(0:3)/BS_B[0:3] negated to A(0:31),
BADDR(28:30) Invalid GPCM, write
access, TRLX = 0, CSNT = 1, CS negated
to A(0:31) invalid GPCM write access
TRLX = 0, CSNT =1 ACS = 10, or
ACS == 11, EBDF = 0
(MIN = 0.50 × B1 – 2.00)
9
Characteristic
(MIN = 0.25 × B1 – 2.00)
MPC852T PowerQUICC™ Hardware Specifications, Rev. 4
8
8
Table 9. Bus Operation Timings (continued)
13.20
43.50
43.50
38.40
38.40
13.20
5.60
5.00
5.00
5.60
Min
33 MHz
Max
10.50
35.50
35.50
31.10
31.10
10.50
4.30
3.00
3.00
4.30
Min
40 MHz
Max
28.00
28.00
24.20
24.20
3.00
8.00
1.10
1.10
3.00
8.00
Min
50 MHz
Max
Freescale Semiconductor
20.70
20.70
17.50
17.50
5.60
5.60
1.80
0.00
0.00
1.80
Min
66 MHz
Max
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns

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