MPC885CVR133 Freescale Semiconductor, MPC885CVR133 Datasheet - Page 63

• Manufacturer Part Number: MPC885CVR133
• Description: IC MPU POWERQUICC 133MHZ 357PBGA
• Manufacturer: Freescale Semiconductor

Specifications of MPC885CVR133

• Processor Type: MPC8xx PowerQUICC 32-Bit
• Speed: 133MHz
• Voltage: 3.3V
• Mounting Type: Surface Mount
• Package / Case: 357-PBGA
• Processor Series: MPC8xx
• Core: MPC8xx
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 133 MHz
• Operating Supply Voltage: 0 V to 5 V
• Maximum Operating Temperature: + 95 C
• Mounting Style: SMD/SMT
• Data Ram Size: 8 KB
• I/o Voltage: 5 V
• Interface Type: I2C, SPI, UART
• Minimum Operating Temperature: 0 C
• Program Memory Size: 8 KB
• Program Memory Type: EPROM/Flash
• For Use With: CWH-PPC-885XN-VX - BOARD EVAL QUICCSTART MPC885CWH-PPC-885XN-VE - BOARD EVAL QUICCSTART MPC885
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

12.9
Table 25
1
Freescale Semiconductor
151A
Num
SyncCLK must be at least twice as fast as SMCLK.
150
151
152
153
154
155
TENA(RTS1)
RENA(CD1)
Notes:
provides the SMC transparent timings as shown in
SMCLK clock period
SMCLK width low
SMCLK width high
SMCLK rise/fall time
SMTXD active delay (from SMCLK falling edge)
SMRXD/SMSYNC setup time
RXD1/SMSYNC hold time
SMC Transparent AC Electrical Specifications
1.
2.
(Output)
(Note 2)
TCLK1
(Input)
(Input)
Transmit clock invert (TCI) bit in GSMR is set.
If RENA is negated before TENA or RENA is not asserted at all during transmit, then the
CSL bit is set in the buffer descriptor at the end of the frame transmission.
TxD1
128
MPC885/MPC880 PowerQUICC Hardware Specifications, Rev. 7
133
1
131
Figure 64. Ethernet Transmit Timing Diagram
Table 25. SMC Transparent Timing
Characteristic
128
121
Figure
132
65.
129
All Frequencies
Min
100
50
50
10
20
—
5
CPM Electrical Characteristics
134
Max
15
50
—
—
—
—
—
Unit
ns
ns
ns
ns
ns
ns
ns
63