MPC8250AVVPIBC Freescale Semiconductor, MPC8250AVVPIBC Datasheet - Page 16

• Manufacturer Part Number: MPC8250AVVPIBC
• Description: IC MPU POWERQUICC II 480-TBGA
• Manufacturer: Freescale Semiconductor

Specifications of MPC8250AVVPIBC

• Processor Type: MPC82xx PowerQUICC II 32-bit
• Speed: 300MHz
• Voltage: 2V
• Mounting Type: Surface Mount
• Package / Case: 480-TBGA
• Processor Series: MPC8xxx
• Core: 603e
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 300 MHz
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: 0 C
• Family Name: MPC82XX
• Device Core: PowerQUICC II
• Device Core Size: 32b
• Frequency (max): 300MHz
• Instruction Set Architecture: RISC
• Operating Supply Voltage (max): 2.2V
• Operating Supply Voltage (min): 1.9V
• Operating Temp Range: 0C to 105C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 480
• Package Type: TBGA
• Leaded Process Compatible: Yes
• Rohs Compliant: Yes
• Peak Reflow Compatible (260 C): Yes
• For Use With: CWH-PPC-8248N-VE - KIT EVAL SYSTEM QUICCSTART 8248
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Electrical and Thermal Characteristics
Figure 8
Table 9
16
1
PIO/IDMA/TIMER[TGATE assertion] input signals
Timings are measured at the pin.
Input specifications are measured from the 50% level of the signal to the 50% level of the rising edge of CLKIN.
sp11
sp12
sp13
sp14
sp15
Max
lists SIU input characteristics.
Spec Number
shows PIO, timer, and DMA signals.
TIMER input signal [TGATE deassertion]
TIMER(sp42/43)/ PIO(sp42a/sp43a)
sp10
sp10
sp10
sp10
sp10
Min
Note: TGATE is asserted on the rising edge of the clock; it is deasserted on the falling edge.
AACK/ARTRY/TA/TS/TEA/DBG/BG/BR
Data bus in normal mode
Data bus in ECC and PARITY modes
DP pins
All other pins
IDMA output signals
Figure 8. PIO, Timer, and DMA Signal Diagram
Table 9. AC Characteristics for SIU Inputs
output signals
MPC8250 Hardware Specifications, Rev. 2
(See note)
(See note)
Sys clk
Characteristic
sp22
sp22
sp42/sp43
66 MHz 83 MHz 66 MHz 83 MHz
1
sp23
Setup (ns)
6
5
8
7
5
5
4
6
6
4
Freescale Semiconductor
sp42a/sp43a
0.5
0.5
0.5
0.5
0.5
sp42/sp43
Hold (ns)
sp23
0.5
0.5
0.5
0.5
0.5