MPC8250AZUPIBC Freescale Semiconductor, MPC8250AZUPIBC Datasheet - Page 23

IC MPU POWERQUICC II 480-TBGA

MPC8250AZUPIBC

Manufacturer Part Number
MPC8250AZUPIBC
Description
IC MPU POWERQUICC II 480-TBGA
Manufacturer
Freescale Semiconductor
Series
PowerQUICC IIr
Datasheet

Specifications of MPC8250AZUPIBC

Processor Type
MPC82xx PowerQUICC II 32-bit
Speed
300MHz
Voltage
2V
Mounting Type
Surface Mount
Package / Case
480-TBGA
Processor Series
MPC8xxx
Core
603e
Data Bus Width
32 bit
Maximum Clock Frequency
300 MHz
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
0 C
Core Size
32 Bit
Program Memory Size
32KB
Cpu Speed
300MHz
Embedded Interface Type
I2C, JTAG, SPI, UART
Digital Ic Case Style
TBGA
No. Of Pins
480
Rohs Compliant
No
Family Name
MPC82XX
Device Core
PowerQUICC II
Device Core Size
32b
Frequency (max)
300MHz
Instruction Set Architecture
RISC
Operating Supply Voltage (max)
2.2V
Operating Supply Voltage (min)
1.9V
Operating Temp Range
0C to 105C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
480
Package Type
TBGA
For Use With
CWH-PPC-8248N-VE - KIT EVAL SYSTEM QUICCSTART 8248
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Features
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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3.2
The PCI mode is selected according to three input pins, as shown in
following:
Freescale Semiconductor
1
2
3
MODCK_H–MODCK[1–3]
is equal to or greater than 133 MHz (150 MHz for extended temperature parts) and the CPM ranges between 66–233
MHz.
resulting configuration does not exceed the frequency rating of the user’s part.
Because of speed dependencies, not all of the possible configurations in
The user should choose the input clock frequency and the multiplication factors such that the frequency of the CPU
Input clock frequency is given only for the purpose of reference. User should set MODCK_H–MODCK_L so that the
PCI Mode
0111_001
0111_010
0111_011
0111_100
0111_101
0111_110
0111_111
1000_000
1000_001
1000_010
1000_011
1000_100
In PCI mode only, PCI_MODCK comes from the LGPL5 pin and
MODCK_H[0–3] comes from {LGPL0, LGPL1, LGPL2, LGPL3}.
The minimum Tval = 2 when PCI_MODCK = 1, and the minimum Tval = 1
when PCI_MODCK = 0. Therefore, designers should use clock
configurations that fit this condition to achieve PCI-compliant AC timing.
Clock configurations change only after POR is asserted.
Table 14. Clock Configuration Modes
Frequency
Input Clock
66 MHz
66 MHz
66 MHz
66 MHz
66 MHz
66 MHz
66 MHz
66 MHz
66 MHz
66 MHz
66 MHz
66 MHz
MPC8250 Hardware Specifications, Rev. 2
2, 3
NOTE: Tval (Output Hold)
CPM Multiplication
NOTE: PCI_MODCK
Factor
3.5
3.5
3.5
3.5
3.5
3.5
3
3
3
3
3
3
NOTE
2
Frequency
200 MHz
200 MHz
200 MHz
200 MHz
200 MHz
200 MHz
233 MHz
233 MHz
233 MHz
233 MHz
233 MHz
233 MHz
CPM
1
(continued)
Table 14
Table
2
Core Multiplication
are applicable.
12. In addition, note the
Factor
2.5
3.5
4.5
2.5
3.5
4.5
2
3
4
2
3
4
2
Clock Configuration Modes
Frequency
133 MHz
166 MHz
200 MHz
233 MHz
266 MHz
300 MHz
133 MHz
166 MHz
200 MHz
233 MHz
266 MHz
300 MHz
Core
2
23

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