MPC862PZQ100B Freescale Semiconductor, MPC862PZQ100B Datasheet - Page 15

• Manufacturer Part Number: MPC862PZQ100B
• Description: IC MPU POWERQUICC 100MHZ 357PBGA
• Manufacturer: Freescale Semiconductor

Specifications of MPC862PZQ100B

• Processor Type: MPC8xx PowerQUICC 32-Bit
• Speed: 100MHz
• Voltage: 3.3V
• Mounting Type: Surface Mount
• Package / Case: 357-PBGA
• Family Name: MPC8xx
• Device Core: PowerQUICC
• Device Core Size: 32b
• Frequency (max): 100MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 2.5/3.3V
• Operating Supply Voltage (max): 3.465/3.6V
• Operating Supply Voltage (min): 2/3.135V
• Operating Temp Range: 0C to 105C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 357
• Package Type: BGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Features: -
• Lead Free Status / Rohs Status: Not Compliant

7.6
Semiconductor Equipment and Materials International
805 East Middlefield Rd.
Mountain View, CA 94043
MIL-SPEC and EIA/JESD (JEDEC) Specifications
(Available from Global Engineering Documents)
JEDEC Specifications
1. C.E. Triplett and B. Joiner, “An Experimental Characterization of a 272 PBGA Within an Automotive
Engine Controller Module,” Proceedings of SemiTherm, San Diego, 1998, pp. 47-54.
2. B. Joiner and V. Adams, “Measurement and Simulation of Junction to Board Thermal Resistance and
Its Application in Thermal Modeling,” Proceedings of SemiTherm, San Diego, 1999, pp. 212-220.
8
Each V
supply. Each GND pin should likewise be provided with a low-impedance path to ground. The power
supply pins drive distinct groups of logic on chip. The V
using at least four 0.1 µF by-pass capacitors located as close as possible to the four sides of the package.
The capacitor leads and associated printed circuit traces connecting to chip V
to less than half an inch per capacitor lead. A four-layer board is recommended, employing two inner
layers as V
All output pins on the MPC862/857T/857DSL have fast rise and fall times. Printed circuit (PC) trace
interconnection length should be minimized in order to minimize undershoot and reflections caused by
these fast output switching times. This recommendation particularly applies to the address and data busses.
Maximum PC trace lengths of six inches are recommended. Capacitance calculations should consider all
device loads as well as parasitic capacitances due to the PC traces. Attention to proper PCB layout and
bypassing becomes especially critical in systems with higher capacitive loads because these loads create
higher transient currents in the V
inputs during reset. Special care should be taken to minimize the noise levels on the PLL supply pins.
9
The maximum bus speed supported by the MPC862/857T/857DSL is 66 MHz. Higher-speed parts must
be operated in half-speed bus mode (for example, an MPC862/857T/857DSL used at 80MHz must be
configured for a 40 MHz bus).
Freescale Semiconductor
CC
Layout Practices
Bus Signal Timing
Period
Freq
References
pin on the MPC862/857T/857DSL should be provided with a low-impedance path to the board’s
CC
and GND planes.
MPC862/857T/857DSL PowerQUICC™ Family Hardware Specifications, Rev. 3
20.00
Min
50 MHz
Table 6. Period Range for Standard Part Frequencies
30.30
Max
Table 6
CC
and GND circuits. Pull up all unused inputs or signals that will be
shows the period ranges for standard part frequencies.
15.15
Min
66 MHz
30.30
Max
CC
power supply should be bypassed to ground
25.00
Min
80 MHz
30.30
Max
http://www.jedec.org
800-854-7179 or
CC
303-397-7956
[phone]
20.00
and GND should be kept
Min
100 MHz
30.30
Max
Layout Practices
15