MC68LC040RC25A Freescale Semiconductor, MC68LC040RC25A Datasheet - Page 262

IC MPU 32BIT 25MHZ 179-PGA

MC68LC040RC25A

Manufacturer Part Number
MC68LC040RC25A
Description
IC MPU 32BIT 25MHZ 179-PGA
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MC68LC040RC25A

Processor Type
M680x0 32-Bit
Speed
25MHz
Voltage
5V
Mounting Type
Surface Mount
Package / Case
179-PGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-

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Freescale Semiconductor, Inc.
particularly careful of the lack of trichotomy in the floating-point branches since it is
common for compilers to invert the sense of conditions.
When using the IEEE nonaware tests, the user receives a BSUN exception whenever a
branch is attempted and the NAN condition code bit is set, unless the branch is an FBEQ
or an FBNE. If the BSUN exception is enabled in the FPCR, the exception causes another
exception. Therefore, the IEEE nonaware program is interrupted if an unexpected
condition occurs. Compilers and programmers who are knowledgeable of the IEEE 754
standard should use the IEEE aware tests in programs that contain ordered and
unordered conditions. Since the ordered or unordered attribute is explicitly included in the
conditional test, the BSUN bit is not set in the FPSR EXC byte when the unordered
condition occurs. Table 9-8 summarizes the conditional mnemonics, definitions,
equations, predicates, and whether the BSUN bit is set in the FPSR EXC byte for the 32
floating-point conditional tests. The equation column lists the combination of FPCC bits for
each test in the form of an equation.
9-18
M68040 USER’S MANUAL
MOTOROLA
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