MPC885ZP66 Freescale Semiconductor, MPC885ZP66 Datasheet - Page 19

IC MPU POWERQUICC 66MHZ 357PBGA

MPC885ZP66

Manufacturer Part Number
MPC885ZP66
Description
IC MPU POWERQUICC 66MHZ 357PBGA
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MPC885ZP66

Processor Type
MPC8xx PowerQUICC 32-Bit
Speed
66MHz
Voltage
3.3V
Mounting Type
Surface Mount
Package / Case
357-PBGA
Processor Series
MPC8xx
Core
MPC8xx
Data Bus Width
32 bit
Maximum Clock Frequency
66 MHz
Maximum Operating Temperature
+ 95 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
0 C
For Use With
CWH-PPC-885XN-VX - BOARD EVAL QUICCSTART MPC885CWH-PPC-885XN-VE - BOARD EVAL QUICCSTART MPC885
Features
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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Manufacturer
Quantity
Price
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Manufacturer:
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Part Number:
MPC885ZP66
Manufacturer:
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Quantity:
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Freescale Semiconductor
B16b
B17a
B22a
B22b
B24a
Num
B22c
B17
B18
B19
B20
B21
B22
B23
B24
B25
B26
B27
BB, BG, BR, valid to CLKOUT (setup time)
(4MIN = 0.00
CLKOUT to TA, TEA, BI, BB, BG, BR valid (hold
time) (MIN = 0.00
CLKOUT to KR, RETRY, CR valid (hold time)
(MIN = 0.00
D(0:31) valid to CLKOUT rising edge (setup time)
(MIN = 0.00 × B1 + 6.00)
CLKOUT rising edge to D(0:31) valid (hold time)
(MIN = 0.00 × B1 + 1.00
D(0:31) valid to CLKOUT falling edge (setup
time)
CLKOUT falling edge to D(0:31) valid (hold time)
(MIN = 0.00 × B1 + 2.00)
CLKOUT rising edge to CS asserted GPCM
ACS = 00 (MAX = 0.25 × B1 + 6.3)
CLKOUT falling edge to CS asserted GPCM
ACS = 10, TRLX = [0 or 1]
(MAX = 0.00 × B1 + 8.00)
CLKOUT falling edge to CS asserted GPCM
ACS = 11, TRLX = [0 or 1], EBDF = 0
(MAX = 0.25 × B1 + 6.3)
CLKOUT falling edge to CS asserted GPCM
ACS = 11, TRLX = [0 or 1], EBDF = 1
(MAX = 0.375 × B1 + 6.6)
CLKOUT rising edge to CS negated GPCM read
access, GPCM write access ACS = 00 and CSNT
= 0 (MAX = 0.00 × B1 + 8.00)
A(0:31) and BADDR(28:30) to CS asserted
GPCM ACS = 10, TRLX = 0
(MIN = 0.25 × B1 – 2.00)
A(0:31) and BADDR(28:30) to CS asserted
GPCM ACS = 11 TRLX = 0
(MIN = 0.50 × B1 – 2.00)
CLKOUT rising edge to OE, WE(0:3) asserted
(MAX = 0.00 × B1 + 9.00)
CLKOUT rising edge to OE negated
(MAX = 0.00
A(0:31) and BADDR(28:30) to CS asserted
GPCM ACS = 10, TRLX = 1
(MIN = 1.25 × B1 – 2.00)
6
(MIN = 0.00 × B1 + 4.00)
×
×
×
B1 + 2.00)
B1 + 0.00)
B1 + 9.00)
Characteristic
MPC885/MPC880 PowerQUICC Hardware Specifications, Rev. 7
×
B1 + 1.00
5
)
Table 9. Bus Operation Timings (continued)
3
)
2
4
4
6
10.90 18.00 10.90 16.00 5.20 12.30 4.69 10.93
13.20
35.90
4.00
1.00
2.00
6.00
1.00
4.00
2.00
7.60 13.80 6.30 12.50 3.80 10.00 3.13
7.60 13.80 6.30 12.50 3.80 10.00 3.13
2.00
5.60
2.00
Min
33 MHz
Max
8.00
8.00
9.00
9.00
10.50
29.30
4.00
1.00
2.00
6.00
1.00
4.00
2.00
2.00
4.30
2.00
Min
40 MHz
Max
8.00
8.00
9.00
9.00
16.90
4.00
2.00
2.00
6.00
2.00
4.00
2.00
2.00
1.80
5.60
2.00
Min
66 MHz
Max
8.00
8.00
9.00
9.00
13.60
4.00
2.00
2.00
6.00
2.00
4.00
2.00
2.00
1.13
4.25
2.00
Min
80 MHz
Bus Signal Timing
Max
9.43
8.00
9.43
8.00
9.00
9.00
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
19

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