Z8018006VSC Zilog, Z8018006VSC Datasheet - Page 58

IC 6MHZ Z180 CMOS ENH MPU 68PLCC

Z8018006VSC

Manufacturer Part Number
Z8018006VSC
Description
IC 6MHZ Z180 CMOS ENH MPU 68PLCC
Manufacturer
Zilog
Datasheet

Specifications of Z8018006VSC

Processor Type
Z180
Features
8-Bit, Enhanced Z80 Megacell
Speed
6MHz
Voltage
5V
Mounting Type
Surface Mount
Package / Case
68-LCC (J-Lead)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
269-3008

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Timer Data Register
Timer Data Register
PS014004-1106
Timer Data Register Channel 1L
Timer Data Register Channel 1H
Break Detect (bit 1)—The receiver sets this
character with a Framing Error becomes the oldest character in the
cleared when software writes a
IOSTOP
Send Break (bit 0)—If this bit and bit
to send a break condition. The duration of the break is under software control (one of the
PRTs
serial output of the transmitter.
Mnemonic TMDR1L:14H
Mnemonic TMDR1H: 15H
or
CTCs
mode, and for
can be used to time it). This bit resets to
Figure 43. Timer Data Register Channel 1L
Figure 44. Timer Data Register Channel 1H
7
7
6
6
ASCIO
5
5
if the
0
4
4
to the
DCD0
3
3
Timer Data
Timer Data
EFR
2
are both
pin is auto-enabled and is negated (High).
2
2
bit in
READ-ONLY
1
1
CNTLA
1
, the transmitter holds the
0
0
0
, in which state
register, also by
bit to
1
RxFIFO
Microprocessor Unit
when an all-zero
TXA
. The bit is
RESET
carries the
TXA
Architecture
, by
pin Low
Z80180
52

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