EZ80190AZ050EC Zilog, EZ80190AZ050EC Datasheet - Page 30
EZ80190AZ050EC
Manufacturer Part Number
EZ80190AZ050EC
Description
IC WEBSERVER 50MHZ XTEMP 100lQFP
Manufacturer
Zilog
Datasheet
1.EZ80190AZ050SG.pdf
(221 pages)
Specifications of EZ80190AZ050EC
Processor Type
eZ80
Features
High Speed, Single-Cycle Instruction-Fetch
Speed
50MHz
Voltage
3.3V
Mounting Type
Surface Mount
Package / Case
100-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
269-3123
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Manufacturer
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Table 1. 100-Pin LQFP Pin Identification of the eZ80190 Device (Continued)
PS006614-1208
Pin
No.
82
83
84
85
86
87
88
Symbol
PD6
DCD0
PD7
RI0
V
GND
X
X
BUSACK Bus
DD
OUT
IN
Function
GPIO Port D
Data Carrier
Detect
GPIO Port D
Ring Indicator Input, Active Low
Power Supply
Ground
Oscillator
Output
Oscillator Input Input
Acknowledge
Signal Direction
Input/Output
Input, Active Low
Input/Output
Output
Output, Active Low The eZ80190 device responds to a Low on the
Description
The PD6 pin can be used for GPIO. It can be
individually programmed as an input or output
and can also be used individually as an interrupt
input. Each Port D pin, when programmed as an
output, can be selected to be an open-drain or
open-source output. Port D is multiplexed with
one channel of the UZI interface.
The DCD0 pin carries the modem status signal to
the UART. This signal is multiplexed with PC6
and PD6.
The PD7 pin can be used for GPIO. It can be
individually programmed as an input or output
and can also be used individually as an interrupt
input. Each Port D pin, when programmed as an
output, can be selected to be an open-drain or
open-source output. Port D is multiplexed with
one channel of the UZI interface.
The RI0 pin carries the modem status signal to
the UART. This signal is multiplexed with PC7
and PD7.
Power Supply
Ground
The X
oscillator. When used, a crystal oscillator should
be connected between X
The X
oscillator. If an external oscillator is used, its clock
output should be connected to this pin. When a
crystal oscillator is used, it should be connected
between X
BUSREQ, by tristating the address, data, and
control signals, and by driving the BUSACK line
Low. During bus acknowledge cycles A23:0,
IORQ, and MREQ are inputs.
OUT
IN
pin is the input to the onboard crystal
IN
pin is the output of the onboard crystal
and X
OUT
.
Product Specification
IN
and X
Architectural Overview
OUT
.
20
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