EZ80190AZ050EC Zilog, EZ80190AZ050EC Datasheet - Page 51
EZ80190AZ050EC
Manufacturer Part Number
EZ80190AZ050EC
Description
IC WEBSERVER 50MHZ XTEMP 100lQFP
Manufacturer
Zilog
Datasheet
1.EZ80190AZ050SG.pdf
(221 pages)
Specifications of EZ80190AZ050EC
Processor Type
eZ80
Features
High Speed, Single-Cycle Instruction-Fetch
Speed
50MHz
Voltage
3.3V
Mounting Type
Surface Mount
Package / Case
100-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
269-3123
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Manufacturer
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PS006614-1208
Table 10. WDT Control Register
WDT Reset Register
Table 11. WDT Reset Register
Bit
Reset
CPU Access
Note: R = Read Only; R/W = Read/Write.
Bit
Position
7
WDT_EN
6
NMI_OUT
5
RST_FLAG
[4:2]
[1:0]
WDT_PERIOD
Bit
Reset
CPU Access
Note: X = Undefined; W = Write Only.
The WDT Reset register, listed in
reset when an
can occur between the writing of the
time-out does not occur prior to completion.
Value Description
0
1
0
1
0
1
000
00
01
10
11
A5h
R/W
WDT is disabled.
WDT is enabled. When enabled, the WDT cannot be disabled
without a full-chip reset.
WDT time-out resets the CPU.
WDT time-out generates a nonmaskable interrupt (NMI) to the
CPU.
RESET caused by external full-chip reset or ZDI reset.
RESET caused by WDT time-out. This flag is set by the WDT
time-out, even if the NMI_OUT flag is set to 1. The CPU can
poll this bit to determine the source of the RESET or NMI.
Reserved.
WDT time-out period is 134,217,728 (2
WDT time-out period is 33,554,432 (2
WDT time-out period is 4,194,304 (2
WDT time-out period is 262,144 (2
value followed by
W
X
7
0
7
R/W
W
X
6
0
6
Table
0/1
W
R
X
5
5
A5h
5Ah
11, is an 8-bit Write Only register. The WDT is
value and the
is written to this register. Any amount of time
W
R
X
4
0
4
(WDT_RR = 94h)
(WDT_CTL = 93h)
W
R
X
3
0
3
18
22
) clock cycles.
5Ah
25
) clock cycles.
27
) clock cycles.
) clock cycles.
W
R
value, so long as the WDT
X
2
0
2
Product Specification
R/W
W
X
1
0
1
Watchdog Timer
R/W
W
X
0
0
0
eZ80190
41
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