IDT79RC32V332-100DH IDT, Integrated Device Technology Inc, IDT79RC32V332-100DH Datasheet - Page 8

• Manufacturer Part Number: IDT79RC32V332-100DH
• Description: IC PROC 32BIT CPU 100MHZ 208-QFP
• Manufacturer: IDT, Integrated Device Technology Inc
• Series: Interprise™r

Specifications of IDT79RC32V332-100DH

• Processor Type: RISC 32-Bit
• Speed: 100MHz
• Voltage: 3.3V
• Mounting Type: Surface Mount
• Package / Case: 208-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Features: -
• Other names: 79RC32V332-100DH

IDT 79RC32332
sdram_bemask_n
[3:0]
sdram_245_oe_n
sdram_245_dt_r_n
On-Chip Peripherals
dma_ready_n[0]
pio[7:0]
uart_rx[0]
uart_tx[0]
spi_mosi
spi_miso
spi_sck
Name
Output
Output
Output
Type
I/O
I/O
I/O
I/O
I/O
I/O
I/O
Status
Reset
State
related
pins
See
H
H
Z
Z
Z
Z
Z
L
L
Capability
Strength
Drive
High
High
Low
Low
Low
Low
Low
Low
Low
Low
SDRAM Byte Enable Mask Negated Bus (DQM)
SDRAM mode: Provides byte enables for each byte lane of all DRAM banks.
SODIMM mode: Provides lower select byte enables [3:0].
SDRAM FCT245 Output Enable Negated Recommend an external pull-up.
SDRAM mode: Controls output enable to optional FCT245 transceiver bank by asserting during both
reads and writes to any DRAM bank.
SDRAM FCT245 Direction Transmit/Receive Recommend an external pull-up.
Uses cpu_dt_r_n. See CPU Core Specific Signals below.
DMA Ready Negated Bus Requires an external pull-up.
Ready mode: Input pin for general purpose DMA channel 0 that can initiate the next datum in the current
DMA descriptor frame.
Done mode: Input pin for general purpose DMA channel 0 that can terminate the current DMA descriptor
frame.
dma_ready_n[0] 1st Alternate function PIO[0]; 2nd Alternate function: dma_done_n[0].
Programmable Input/Output
General purpose pins that can each can be configured as a general purpose input or general purpose
output. These pins are multiplexed with other pin functions:
pci_gnt_n[1] (pci_eeprom_cs), spi_mosi, spi_sck, spi_ss_n, spi_miso, uart_rx[0], uart_tx[0],
dma_ready_n[0]. Note that pci_gnt_n[1], spi_mosi, spi_sck, and spi_ss_n default to outputs at reset time.
The others default to inputs.
UART Receive Data Bus
UART mode: UART channel receive data.
uart_rx[0] Alternate function: PIO[2].
UART Transmit Data Bus Recommend an external pull-up.
UART mode: UART channel send data. Note that this pin defaults to an input at reset time and must be
programmed via the PIO interface before being used as a UART output.
uart_tx[0] Alternate function: PIO[1].
SPI Data Output
Serial mode: Output pin from RC32332 as an Input to a Serial Chip for the Serial data input stream.
In PCI satellite mode, acts as an Output pin from RC32332 that connects as an Input to a Serial Chip for
the Serial data input stream for loading PCI Configuration Registers in the RC32332 Reset Initialization
Vector PCI boot mode.
1st Alternate function: PIO[6]. Defaults to the output direction at reset time.
2nd Alternate function: pci_eeprom_mdo.
SPI Data Input
Serial mode: Input pin to RC32332 from the Output of a Serial Chip for the Serial data output stream.
In PCI satellite mode, acts as an Input pin from RC32332 that connects as an output to a Serial Chip for
the Serial data output stream for loading PCI Configuration Registers in the RC32332 Reset Initialization
Vector PCI boot mode. Defaults to input direction at reset time.
1st Alternate function: PIO[3].
2nd Alternate function: pci_eeprom_mdi.
SPI Clock
Serial mode: Output pin for Serial Clock.
In PCI satellite mode, acts as an Output pin for Serial Clock for loading PCI Configuration Registers in the
RC323332 Reset Initialization Vector PCI boot mode.
1st Alternate function: PIO[5]. Defaults to the output direction at reset time.
2nd Alternate function: pci_eeprom_sk.
Table 1 Pin Descriptions (Part 4 of 6)
8 of 30
Description
May 4, 2004