IDT79RC32V334-150BB IDT, Integrated Device Technology Inc, IDT79RC32V334-150BB Datasheet - Page 5

IC PROC 32BIT CORE 150MHZ 256BGA

IDT79RC32V334-150BB

Manufacturer Part Number
IDT79RC32V334-150BB
Description
IC PROC 32BIT CORE 150MHZ 256BGA
Manufacturer
IDT, Integrated Device Technology Inc
Series
Interprise™r
Datasheet

Specifications of IDT79RC32V334-150BB

Processor Type
RISC 32-Bit
Speed
150MHz
Voltage
3.3V
Mounting Type
Surface Mount
Package / Case
256-BGA
Family Name
RC32300
Device Core
MIPS-II
Device Core Size
32b
Frequency (max)
150MHz
Instruction Set Architecture
MIPS-II
Supply Voltage 1 (typ)
3.3V
Operating Supply Voltage (max)
3.465V
Operating Supply Voltage (min)
3.135V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
256
Package Type
BGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Features
-
Lead Free Status / Rohs Status
Not Compliant
Other names
79RC32V334-150BB

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Pin Description Table
and pull-downs require
Local System Interface
mem_data[31:0]
mem_addr[25:2]
mem_cs_n[5:0]
mem_oe_n
IDT 79RC32334—Rev. Y
The following table lists the pins provided on the RC32334. Note that those pin names followed by ”_n” are active-low signals. All external pull-ups
Name
Output
Output
Type
10 kΩ resistor.
I/O
I/O
[25:10] Z
Status
Reset
State
[9:2] L
Z
H
H
Capability
Strength
[25:17] Low
[16:2] High
Low with
internal
Drive
pull-up
High
High
Local System Data Bus
Primary data bus for memory. I/O and SDRAM.
Memory Address Bus
These signals provide the Memory or DRAM address, during a Memory or DRAM bus transaction. During
each word data, the address increments either in linear or sub-block ordering, depending on the transac-
tion type. The table below indicates how the memory write enable signals are used to address discreet
memory port width types.
mem_addr[22] Alternate function: reset_boot_mode[1].
mem_addr[21] Alternate function: reset_boot_mode[0].
mem_addr[20] Alternate function: reset_pci_host_mode.
mem_addr[19] Alternate function: modebit [9].
mem_addr[18] Alternate function: modebit [8].
mem_addr[17] Alternate function: modebit [7].
mem_addr[16] Alternate function: sdram_addr[16].
mem_addr[15] Alternate function: sdram_addr[15].
mem_addr[14] Alternate function: sdram_addr[14].
mem_addr[13] Alternate function: sdram_addr[13].
mem_addr[11] Alternate function: sdram_addr[11].
mem_addr[10] Alternate function: sdram_addr[10].
mem_addr[9] Alternate function: sdram_addr[9].
mem_addr[8] Alternate function: sdram_addr[8].
mem_addr[7] Alternate function: sdram_addr[7].
mem_addr[6] Alternate function: sdram_addr[6].
mem_addr[5] Alternate function: sdram_addr[5].
mem_addr[4] Alternate function: sdram_addr[4].
mem_addr[3] Alternate function: sdram_addr[3].
mem_addr[2] Alternate function: sdram_addr[2].
Memory Chip Select Negated
Recommend external pull-up.
Signals that a Memory Bank is actively selected.
Memory Output Enable Negated
Recommend external pull-up.
Signals that a Memory Bank can output its data lines onto the cpu_ad bus.
DMA (32-bit) mem_we_n[3]
32-bit
16-bit
8-bit
Port Width
Table 1 Pin Description (Part 1 of 7)
mem_we_n[3]
Byte High Write Enable mem_addr[1]
Not Used (Driven High) mem_addr[1]
5 of 30
mem_we_n[3]
Pin Signals
mem_we_n[2] mem_we_n[1]
mem_we_n[2] mem_we_n[1]
mem_we_n[2]
Description
Not Used (Driven
Low)
mem_addr[0]
mem_we_n[1]
mem_we_n[0]
mem_we_n[0]
Byte Low Write
Enable
Byte Write Enable
August 31, 2004
mem_we_n[0]

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