MPC860TZQ50D4 Freescale Semiconductor, MPC860TZQ50D4 Datasheet - Page 18

IC MPU POWERQUICC 50MHZ 357PBGA

MPC860TZQ50D4

Manufacturer Part Number
MPC860TZQ50D4
Description
IC MPU POWERQUICC 50MHZ 357PBGA
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MPC860TZQ50D4

Processor Type
MPC8xx PowerQUICC 32-Bit
Speed
50MHz
Voltage
3.3V
Mounting Type
Surface Mount
Package / Case
357-PBGA
Family Name
MPC8xx
Device Core
PowerQUICC
Device Core Size
32b
Frequency (max)
50MHz
Instruction Set Architecture
RISC
Supply Voltage 1 (typ)
2.5/3.3V
Operating Supply Voltage (max)
3.465/3.6V
Operating Supply Voltage (min)
2/3.135V
Operating Temp Range
0C to 95C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
357
Package Type
BGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Features
-
Lead Free Status / Rohs Status
Not Compliant

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Bus Signal Timing
18
B29d
B29e
B29g
B29h
B30a
B30b
B30d
Num
B30c
B29f
B29i
B30
B31
WE(0:3) negated to D(0:31), DP(0:3) High-Z
GPCM write access, TRLX = 1, CSNT = 1,
EBDF = 0
CS negated to D(0:31), DP(0:3) High-Z
GPCM write access, TRLX = 1, CSNT = 1,
ACS = 10, or ACS = 11, EBDF = 0
WE(0:3) negated to D(0:31), DP(0:3) High-Z
GPCM write access, TRLX = 0, CSNT = 1,
EBDF = 1
CS negated to D(0:31), DP(0:3) High-Z
GPCM write access, TRLX = 0, CSNT = 1,
ACS = 10, or ACS = 11, EBDF = 1
WE(0:3) negated to D(0:31), DP(0:3) High-Z
GPCM write access, TRLX = 1, CSNT = 1,
EBDF = 1
CS negated to D(0:31), DP(0:3) High-Z
GPCM write access, TRLX = 1, CSNT = 1,
ACS = 10, or ACS = 11, EBDF = 1
CS, WE(0:3) negated to A(0:31),
BADDR(28:30) invalid GPCM write access
WE(0:3) negated to A(0:31), BADDR(28:30)
invalid GPCM, write access, TRLX = 0,
CSNT = 1, CS negated to A(0:31) invalid
GPCM write access, TRLX = 0, CSNT = 1
ACS = 10, or ACS = 11, EBDF = 0
WE(0:3) negated to A(0:31), invalid GPCM
BADDR(28:30) invalid GPCM write access,
TRLX = 1, CSNT = 1. CS negated to
A(0:31), Invalid GPCM, write access,
TRLX = 1, CSNT = 1, ACS = 10, or
ACS = 11, EBDF = 0
WE(0:3) negated to A(0:31), BADDR(28:30)
invalid GPCM write access, TRLX = 0,
CSNT = 1. CS negated to A(0:31) invalid
GPCM write access, TRLX = 0, CSNT = 1,
ACS = 10, ACS = 11, EBDF = 1
WE(0:3) negated to A(0:31), BADDR(28:30)
invalid GPCM write access, TRLX = 1,
CSNT =1. CS negated to A(0:31) invalid
GPCM write access TRLX = 1, CSNT = 1,
ACS = 10, or ACS = 11, EBDF = 1
CLKOUT falling edge to CS valid—as
requested by control bit CST4 in the
corresponding word in UPM
Characteristic
MPC860 PowerQUICC™ Family Hardware Specifications, Rev. 8
Table 7. Bus Operation Timings (continued)
8
43.45
43.45
38.67
38.67
13.15
43.45
38.67
8.86
8.86
5.58
8.36
1.50
Min
33 MHz
Max
6.00
31.38
31.38
10.50
35.50
31.38
35.5
35.5
6.88
6.88
4.25
6.38
1.50
Min
40 MHz
Max
6.00
28.00
28.00
24.50
24.50
28.00
24.50
5.00
5.00
3.00
8.00
4.50
1.50
Min
50 MHz
Max
6.00
Freescale Semiconductor
20.73
29.73
17.83
17.83
20.73
17.83
3.18
3.18
1.79
5.58
2.68
1.50
Min
66 MHz
Max
6.00
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns

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