MC68MH360AI25L Freescale Semiconductor, MC68MH360AI25L Datasheet - Page 35

• Manufacturer Part Number: MC68MH360AI25L
• Description: IC MPU QUICC 25MHZ 240-FQFP
• Manufacturer: Freescale Semiconductor

Specifications of MC68MH360AI25L

• Processor Type: M683xx 32-Bit
• Speed: 25MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 240-FQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -

2.1.8 Data Buffer Pointer
As with the standard CPM protocols, the data buffer is addressed by a 32-bit pointer within
the buffer descriptor. This addresses the data received or transmitted from external memory.
2.1.9 Data Buffer
The data buffers in external memory can hold up to 64 Kbytes of data as determined by the
data length in the buffer descriptor.
2.2 Global Multichannel Parameters
The global multichannel parameters reside in the SCC’s parameter RAM page and are
common to all logical channels.
The largest portion of the global area is the time slot assigner tables for the receiver and
transmitter section of the SCC. For 32-channel support, there is one table for Tx and one
for Rx within the parameter RAM. If the connection is split over multiple SCCs, this table
only needs to be present once for multiple SCCs operating in QMC mode. See Section 2.3,
“Multiple SCC Assignment Tables,” for more information. For 64-channel support there is
only space for one table; therefore common Rx and Tx parameters will need to be used
unless one of the TSA tables can be accommodated elsewhere in memory, such as in the
parameter RAM area of another SCC.
The dual-ported RAM is used for the channel-specific area for all SCCs. It is important that
individual time slots are mapped to only one SCC, and that individual logical channels are
separated to avoid contention.
Table 2-1 lists the global parameters. Note that the boldfaced parameters must be initialized
by the user. See Chapter 6, “QMC Initialization,” for more information.
Offset
Base
SCC
00
04
to
MCBASE
QMCSTATE
Name
Freescale Semiconductor, Inc.
32
16
For More Information On This Product,
Width
(Bits)
Table 2-1. Global Multichannel Parameters
Chapter 2. QMC Memory Organization
Multichannel base pointer—This host-initialized parameter points to the starting
address of the 64-Kbyte buffer descriptor table in external memory. The
MCBASE is used with the TBASE and RBASE registers in the channel-specific
parameters.
Multichannel controller state (initialize to 0x8000)—Internal QMC state machine
value used by RISC processor for global state definition.
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