MC68030RC16C Freescale Semiconductor, MC68030RC16C Datasheet - Page 489
MC68030RC16C
Manufacturer Part Number
MC68030RC16C
Description
IC MPU 32BIT ENHANCED 128-PGA
Manufacturer
Freescale Semiconductor
Datasheet
1.MC68030FE20C.pdf
(599 pages)
Specifications of MC68030RC16C
Processor Type
M680x0 32-Bit
Speed
166MHz
Voltage
5V
Mounting Type
Surface Mount
Package / Case
128-PGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
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I1
11.6.1 Fetch Effective Address (fea)
11-26
for the processor to calculate and fetch the specified effective address. The
total number of clock cycles is outside the parentheses. The number of read,
All timing data assumes two-clock reads and writes.
I
The fetch effective address table indicates the number of clock periods needed
effective addresses are divided by their formats (refer to 2.5
Encoding Summary).
prefetch, and write cycles is given inside the parentheses as (r/p/w). The read,
prefetch, and write cycles are included in the total clock cycle number.
I
SINGLE EFFECTIVE ADDRESS
% Dn
% An
BRIEF FORMAT EXTENSION WORD
(An)
#(data).B
#(data).L
(An) ÷
(d16,An) or (d16,PC)
(xxx).W
(xxx).L
#(data).W
(dS'An'xn) °r (d8'PC'xn,
- (An)
Ad,r.a ede
INSTRUCTION FORMAT
For instruction-cache case and for no-cache case, the
MC68030 USER'S MANUAL
I
I
- -
- -
,ead
0
2
2
2
2
2
4
1
1
4
]
I
- -
- -
2
2
0
0
0
0
1
1
2
Ta,
2
,-Cac, eC.e I NoCao.eC.el
4(1/0/0)
4(1/0/0)
4(1/0/0)
2(0/0/0)
4(0/0/0)
o(o/o/o)
o(o/o/o)
3(1/0/0)
3(1/0/0)
4(1/0/0)
2(0/0/0)
I
Effective Address
I
6(1/0/0)
MOTOROLA
o(O/OlO)
0(0/0/0)
4(1/0/0)
5(1/1/0)
4(1/1/0)
4(0/1/0)
]
3(1/0/0)
3(1/0/0)
4(1/1/0)
2(0/1/0)
2(0/1/0)
6(1/1/0)
I
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