XPC8260ZUIFBC Freescale Semiconductor, XPC8260ZUIFBC Datasheet - Page 15

• Manufacturer Part Number: XPC8260ZUIFBC
• Description: IC MPU POWERQUICC II 480-TBGA
• Manufacturer: Freescale Semiconductor
• Series: PowerQUICC IIr

Specifications of XPC8260ZUIFBC

• Processor Type: MPC82xx PowerQUICC II 32-bit
• Speed: 200MHz
• Voltage: 2.5V
• Mounting Type: Surface Mount
• Package / Case: 480-TBGA
• Family Name: MPC82XX
• Device Core: PowerQUICC II
• Device Core Size: 32b
• Frequency (max): 200MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 1.8V
• Operating Supply Voltage (max): 1.9V
• Operating Supply Voltage (min): 1.7V
• Operating Temp Range: 0C to 105C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 480
• Package Type: TBGA
• Core Size: 32 Bit
• Program Memory Size: 32KB
• Cpu Speed: 133MHz
• Embedded Interface Type: I2C, MII, SPI, TDM, UTOPIA
• Digital Ic Case Style: TBGA
• No. Of Pins: 480
• Rohs Compliant: No
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Features: -
• Lead Free Status / Rohs Status: Not Compliant

Figure 5
Figure 6
Freescale Semiconductor
shows the SCC/SMC/SPI/I
shows the SCC/SMC/SPI/I
MPC8260 PowerQUICC II Integrated Communications Processor Hardware Specifications, Rev. 2
SCC/SMC/SPI/I2C output signals
SCC/SMC/SPI/I2C output signals
SCC/SMC/SPI/I2C input signals
SCC/SMC/SPI/I2C input signals
(See note)
(See note)
(See note)
(See note)
Note: There are four possible timing conditions for SCC and SPI:
Note: There are four possible timing conditions for SCC and SPI:
1. Input sampled on the rising edge and output driven on the rising edge (shown).
2. Input sampled on the rising edge and output driven on the falling edge.
3. Input sampled on the falling edge and output driven on the falling edge.
4. Input sampled on the falling edge and output driven on the rising edge.
1. Input sampled on the rising edge and output driven on the rising edge (shown).
2. Input sampled on the rising edge and output driven on the falling edge.
3. Input sampled on the falling edge and output driven on the falling edge.
4. Input sampled on the falling edge and output driven on the rising edge.
Figure 5. SCC/SMC/SPI/I
Serial CLKin
Figure 6. SCC/SMC/SPI/I
BRG_OUT
2
2
C external clock.
C internal clock.
sp18b
sp18a
2
2
C External Clock Diagram
C Internal Clock Diagram
sp38b/sp39b
sp19a
sp38a/sp39a
sp19b
Electrical and Thermal Characteristics
15