AT75C310-Q160 Atmel, AT75C310-Q160 Datasheet - Page 7

• Manufacturer Part Number: AT75C310-Q160
• Description: IC SIAP ARM/THUMB OAKDSP 160PQFP
• Manufacturer: Atmel

Specifications of AT75C310-Q160

• Processor Type: Smart Internet Appliance Processor
• Speed: 40MHz
• Voltage: 3.3V
• Mounting Type: Surface Mount
• Package / Case: 160-MQFP, 160-PQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Features: -

EBI: External Bus
Interface
AIC: Advanced Interrupt
Controller
PIO: Parallel I/O
Controller
1369AS–03/01
The EBI generates the signals that control access to external memory or memory-
mapped peripherals. The EBI is fully programmable and can address up to 64M bytes.
The interface to external devices is composed of common address and data buses and
separate control lines to allow the connection of static or dynamic devices.
The main features are:
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The AT75C310 has an 8-level priority interrupt controller. The interrupt controller out-
puts are connected to the NFIQ (fast interrupt request) and the NIRQ (normal interrupt
request) of the ARM7TDMI core. The processor’s NFIQ can only be asserted by the
external fast interrupt request input (FIQ). The NIRQ line can be asserted by the inter-
rupts generated by the on-chip peripherals or by the external interrupt request line IRQ0.
An 8-level priority encoder allows the application to define the priority between the differ-
ent interrupt sources. Interrupt sources are programmed to be level sensitive or edge
sensitive. External sources can be programmed to be positive- or negative-edge trig-
gered, or low- or high-level sensitive.
The AT75C310 has 23 programmable I/O lines. They can all be programmed as inputs
or outputs. To optimize the use of available package pins, most of them are multiplexed
with external signals of on-chip peripherals.
The PIO lines are controlled by two separate and identical PIO controllers called PIOA
and PIOB.
The PIO controllers enable the generation of an interrupt on input change and insertion
of a simple glitch filter on each PIO line.
Some I/O lines have enough drive capability to power a LED.
External memory mapping
Up to two chip select lines
8- or 16-bit data bus
Byte write or byte select lines
Remap of boot memory
Support for both static and dynamic memories
Two different read protocols for static memories
Support for early read/early write for dynamic memories
Programmable wait state generation
Programmable data float time
AT75C310
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