668-0011 Rabbit Semiconductor, 668-0011 Datasheet - Page 56
668-0011
Manufacturer Part Number
668-0011
Description
IC MPU RABIT3000A 55.5MHZ128LQFP
Manufacturer
Rabbit Semiconductor
Datasheet
1.20-668-0011.pdf
(312 pages)
Specifications of 668-0011
Rohs Status
RoHS non-compliant
Processor Type
Rabbit 3000 8-Bit
Speed
55.5MHz
Voltage
2.5V, 2.7V, 3V, 3.3V
Mounting Type
Surface Mount
Package / Case
128-LQFP
Features
-
Other names
316-1043
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It is possible to extend the timing of the /OE and/or /WE strobes by one half of a clock.
This provides slightly longer strobes for slower memories; see the timing diagrams in
Chapter 27. These options are available in MTCR.
It is possible to force /CS1 to be always active in MMIDR; enabling this will cause conflicts
only if a device shares a /OE or /WE strobe with another device. This option allows faster
access to particular memory devices.
5.3.3 Separate Instruction and Data Space
To make better use of the 64 KB of logical space, an option is provided to map code and
data accesses in the same address space to separate devices. This is accomplished by
enabling the inversion of A16 and the most-significant bit of the bank select bits for
accesses in the root and data segments. Careful use of these features allows both code and
data to separately use up to 64 KB of logical memory.
Starting with the Rabbit 3000A, the RAM segment register (RAMSR) provides a shortcut
for updating code by accessing it as data. It provides a “window” that uses the instruction
address decoding when read or written as data. This mapping will only occur when the
RAMSR is within the root or data segements; the RAMSR will be ignored if it is mapped
to the stack segement or XPC window.
The Rabbit 3000 Designer’s Handbook provides further details on the use of the separate
instruction and data space feature.
5.3.4 Memory Protection (Rabbit 3000A)
The ability to inhibit writes to physical memory was added starting with the Rabbit 3000A.
The sixteen 64 KB physical memory blocks can be individually protected, and two of
those blocks can additionally be subdivided and protected at a granularity of 4 KB. When
a write is attempted, a new Priority 3 write-protection interrupt request is generated.
The write-protection can be enabled for the User mode only or for all modes.
Figure 5-5. Sample Memory Protection Layout
46
Rabbit 3000 Microprocessor User’s Manual
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