TG80960JT100 Intel, TG80960JT100 Datasheet - Page 10

• Manufacturer Part Number: TG80960JT100
• Description: IC MPU I960JT 3V 100MHZ 132-QFP
• Manufacturer: Intel

Specifications of TG80960JT100

• Rohs Status: RoHS non-compliant
• Processor Type: i960
• Features: JT suffix, 32-Bit, 16k Cache, Extended Temp
• Speed: 100MHz
• Voltage: 3V
• Mounting Type: Surface Mount
• Package / Case: 132-QFP
• Other names: 824389

80960JA/JF/JD/JS/JC/JT 3.3 V Embedded 32-Bit Microprocessor
2.1
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Figure 2. 80960Jx Block Diagram
The Solutions960
processor family. Many of these tools are developed by partner companies; some are developed by
Intel, such as profile-driven optimizing compilers. For more information on these products, contact
your local Intel representative.
80960 Processor Core
The 80960Jx family is a scalar implementation of the 80960 core architecture. Intel designed this
processor core as a very high performance device that is also cost-effective. Factors that contribute
to the core’s performance include:
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•
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•
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CLKIN
Local Register Cache
TAP
SRC1
Core operates at the bus speed with the 80960JA/JF/JS
Core operates at two or three times the bus speed with the 80960JD/JC and 80960JT,
respectively
Single-clock execution of most instructions
Independent Multiply/Divide Unit
Efficient instruction pipeline minimizes pipeline break latency
Register and resource scoreboarding allow overlapped instruction execution
128-bit register bus speeds local register caching
Two-way set associative, integrated instruction cache
Direct-mapped, integrated data cache
1-Kbyte integrated data RAM delivers zero wait state program data
5
Global / Local
Register File
8-Set
SRC2 DEST
Boundary Scan
PLL, Clocks,
Power Mgmt
128
Controller
3 Independent 32-Bit SRC1, SRC2, and DEST Buses
®
program features a wide variety of development tools which support the i960
Multiply
Divide
Unit
80960JS/JC/JT - 16K
Instruction Sequencer
Generation
Execution
Address
Instruction Cache
80960JF/JD - 4K
address
Constants
effective
and
Unit
80960JA - 2K
Control
32-bit Address
32-bit Data
Interface
Memory
Unit
address / data
32-bit buses
Interrupt Controller
Register Interface
Memory-Mapped
80960JF/JD - 2K
80960JS/JC/JT -
Physical Region
Programmable
Bus Request
Direct Mapped
Configuration
80960JA - 1K
1K Data RAM
Data Cache
Control Unit
Two 32-Bit
Queues
Timers
Bus
Datasheet
Control
Data Bus
Address/
Interrupt
Port
21
32
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