TG80960JT100 Intel, TG80960JT100 Datasheet - Page 76

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TG80960JT100

Manufacturer Part Number
TG80960JT100
Description
IC MPU I960JT 3V 100MHZ 132-QFP
Manufacturer
Intel
Datasheet

Specifications of TG80960JT100

Rohs Status
RoHS non-compliant
Processor Type
i960
Features
JT suffix, 32-Bit, 16k Cache, Extended Temp
Speed
100MHz
Voltage
3V
Mounting Type
Surface Mount
Package / Case
132-QFP
Other names
824389

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AD31:0, A3:2,D/C#
ALE#,W/R#,
WIDTH/HLTD1:0
BE3:0#, DEN#,
ALE#, ADS#,
3. Since the bus is idle, hold requests are honored during reset and built-in self-test.
4. When selected, built-in self test requires approximately (in CLKIN periods): 393,000 for 80960JT, 580,012 for the 80960JC,
1,176,025 for the 80960JS, 207,000 for 80960JD, and 414,000 for 80960JA/JF.
1. The processor asserts FAIL# during built-in self-test. When self- test passes, the FAIL# pin is deasserted.The processor also asserts FAIL#
2. If the processor fails built-in self-test, it initiates one dummy load bus access. The load address indicates the point of self-test failure.
Notes:
RESET#
during the bus confidence test. When the bus confidence test passes, FAIL# is deasserted and the processor begins user program execution.
BLAST#
LOCK#/
HOLDA
ONCE#
STEST
CLKIN
HOLD
DT/R#
FAIL#
V
CC
V
10,000 CLKIN periods, for PLL stabilization.
CC and CLKIN stable to RESET High, minimum
Valid Input (Note 3)
Valid Output (Note 3)
Idle (Note 2)
Valid
(Input)
Built-in self-test (Note 4)
(Output)
(Note 1)
First
Bus
Activity

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