ATF16V8CZ-15JU Atmel, ATF16V8CZ-15JU Datasheet - Page 10

IC PLD 15NS 20PLCC

ATF16V8CZ-15JU

Manufacturer Part Number
ATF16V8CZ-15JU
Description
IC PLD 15NS 20PLCC
Manufacturer
Atmel
Datasheet

Specifications of ATF16V8CZ-15JU

Programmable Type
EE PLD
Number Of Macrocells
8
Voltage - Input
5V
Speed
15ns
Mounting Type
Surface Mount
Package / Case
20-PLCC
Logic Family
ATF16V8CZ
Maximum Operating Frequency
62 MHz
Number Of Programmable I/os
8
Delay Time
15 ns
Operating Supply Voltage
5 V
Supply Current
105 mA
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Number Of Product Terms Per Macro
8
Supply Voltage (max)
5.5 V
Supply Voltage (min)
4.5 V
Logic Type
EEPLD
Propagation Delay
15ns
No. Of I/o's
8
Frequency
62MHz
Supply Current Max
105mA
Supply Voltage Range
4.5V To 5.5V
Operating Temperature Range
-40°C To +85°C
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATF16V8CZ-15JU
Manufacturer:
Atmel
Quantity:
10 000
Part Number:
ATF16V8CZ-15JU
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
8. Macrocell Configuration
8.1
10
ATF16V8CZ Registered Mode
ATF16V8CZ
Software compilers support the three different OMC modes as different device types. These
device types are listed in the table below. Most compilers have the ability to automatically select
the device type, generally based on the register usage and output enable (OE) usage. Register
usage on the device forces the software to choose the registered mode. All combinatorial out-
puts with OE controlled by the product term will force the software to choose the complex mode.
The software will choose the simple mode only when all outputs are dedicated combinatorial
without OE control. The different device types listed in the table can be used to override the
automatic device selection by the software. For further details, refer to the compiler software
manuals.
When using compiler software to configure the device, the user must pay special attention to the
following restrictions in each mode.
In registered mode pin 1 and pin 11 are permanently configured as clock and output enable,
respectively. These pins cannot be configured as dedicated inputs in the registered mode.
In complex mode pin 1 and pin 11 become dedicated inputs and use the feedback paths of pin
19 and pin 12 respectively. Because of this feedback path usage, pin 19 and pin 12 do not have
the feedback option in this mode.
In simple mode all feedback paths of the output pins are routed via the adjacent pins. In doing
so, the two inner most pins (pins 15 and 16) will not have the feedback option as these pins are
always configured as dedicated combinatorial output.
PAL Device Emulation/PAL Replacement. The registered mode is used if one or more regis-
ters are required. Each macrocell can be configured as either a registered or combinatorial
output or I/O, or as an input. For a registered output or I/O, the output is enabled by the OE pin,
and the register is clocked by the CLK pin. Eight product terms are allocated to the sum term.
For a combinatorial output or I/O, the output enable is controlled by a product term, and seven
product terms are allocated to the sum term. When the macrocell is configured as an input, the
output enable is permanently disabled.
Any register usage will make the compiler select this mode. The following registered devices can
be emulated using this mode:
16R8
16R6
16R4
16RP8
16RP6
16RP4
0453H–PLD–7/05

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