CS42448-CQZ Cirrus Logic Inc, CS42448-CQZ Datasheet - Page 31

• Manufacturer Part Number: CS42448-CQZ
• Description: IC CODEC 108DB 192KHZ 64LQFP
• Manufacturer: Cirrus Logic Inc
• Type: Audio Codecr

Specifications of CS42448-CQZ

• Package / Case: 64-LQFP
• Data Interface: Serial
• Resolution (bits): 24 b
• Number Of Adcs / Dacs: 6 / 8
• Sigma Delta: Yes
• Dynamic Range, Adcs / Dacs (db) Typ: 105 / 108 (Differential), 102 / 105 (Single-Ended)
• Voltage - Supply, Analog: 3.14 V ~ 5.25 V
• Voltage - Supply, Digital: 3.14 V ~ 5.25 V
• Operating Temperature: -10°C ~ 70°C
• Mounting Type: Surface Mount
• Number Of Adc Inputs: 10
• Number Of Dac Outputs: 8
• Conversion Rate: 192 KSPS
• Interface Type: Serial (I2C, SPI)
• Resolution: 24 bit
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 10 C
• Number Of Channels: 6 ADC/8 DAC
• Thd Plus Noise: - 98 dB ADC / - 98 dB DAC, - 95 dB ADC / - 95 dB DAC
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 598-1151 - BOARD EVAL FOR CS42448 CODEC
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 598-1033

DS648F3
4.5
CODEC Digital Interface Formats
The ADC and DAC serial ports support the I²S, Left-Justified, Right-Justified, One-Line Mode (OLM) and
TDM digital interface formats with varying bit depths from 16 to 32 as shown in
clocked out of the ADC on the falling edge of SCLK and clocked into the DAC on the rising edge. The serial
bit clock, DAC_SCLK and/or ADC_SCLK, must be synchronously derived from the master clock and be
equal to 256x, 128x, 64x, 48x or 32x Fs, depending on the interface format selected and desired speed
mode. One-Line Mode #1 and One-Line Mode #2 will operate in master or slave mode. Refer to
required clock ratios. The SCLK to sample rate (LRCK) ratios are shown in
MCLK/LRCK
SCLK/LRCK (Slave Mode)
SCLK/LRCK (Master Mode)
MCLK/LRCK
SCLK/LRCK (Slave Mode)
SCLK/LRCK (Master Mode)
MCLK/LRCK
SCLK/LRCK (Slave Mode)
SCLK/LRCK (Master Mode)
MCLK/LRCK
SCLK/LRCK (Slave Mode)
SCLK/LRCK (Master Mode)
Ratio
256x, 384x, 512x,
256x, 384x, 512x,
256x, 384x, 512x,
256x, 384x, 512x,
32x, 48x, 64x
768x, 1024x
768x, 1024x
768x, 1024x
768x, 1024x
Table 5. I²S, LJ, RJ Clock Ratios
Table 6. OLM#1 Clock Ratios
Table 7. OLM#2 Clock Ratios
256X
SSM
SSM
128x
128x
SSM
256x
256x
SSM
Table 8. TDM Clock Ratios
N/A
64x
I²S, Left-Justified, Right-Justified
128x, 192x, 256x, 384x,
256x, 384x, 512x
256x, 384x, 512x
256x, 384x, 512x
32x, 48x, 64x
DSM
OLM #1
DSM
OLM #2
DSM
DSM
256X
512x
128x
128x
256x
256x
N/A
64x
TDM
Tables 5
64x, 96x, 128x, 192x,
Figures
QSM (DAC only)
through 8.
32x, 48x, 64x
QSM
QSM
QSM
256X
256x
256x
N/A
N/A
N/A
N/A
N/A
N/A
N/A
64x
15-19. Data is
CS42448
Table 5
for
31