CS42528-CQZ Cirrus Logic Inc, CS42528-CQZ Datasheet - Page 56
![IC CODEC S/PDIF RCVR 64LQFP](/photos/6/80/68064/cs42528-cqz_sml.jpg)
CS42528-CQZ
Manufacturer Part Number
CS42528-CQZ
Description
IC CODEC S/PDIF RCVR 64LQFP
Manufacturer
Cirrus Logic Inc
Type
General Purposer
Datasheet
1.CS42528-CQZ.pdf
(91 pages)
Specifications of CS42528-CQZ
Package / Case
64-LQFP
Data Interface
Serial
Resolution (bits)
24 b
Number Of Adcs / Dacs
2 / 8
Sigma Delta
Yes
Dynamic Range, Adcs / Dacs (db) Typ
114 / 114
Voltage - Supply, Analog
4.75 V ~ 5.25 V
Voltage - Supply, Digital
3.13 V ~ 5.25 V
Operating Temperature
-10°C ~ 70°C
Mounting Type
Surface Mount
Number Of Adc Inputs
2
Number Of Dac Outputs
8
Conversion Rate
192 KSPS
Interface Type
Serial (SPI)
Resolution
24 bit
Operating Supply Voltage
3.3 V, 5 V
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 10 C
Number Of Channels
2 ADC/8 DAC
Thd Plus Noise
- 100 dB ADC / - 100 dB DAC
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
598-1503 - BOARD EVAL FOR CS42528/CS49300
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
598-1038
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
CS42528-CQZ
Manufacturer:
Cirrus Logic Inc
Quantity:
135
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Part Number:
CS42528-CQZ
Manufacturer:
CRYSTAL
Quantity:
850
Company:
Part Number:
CS42528-CQZ
Manufacturer:
Cirrus Logic Inc
Quantity:
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Part Number:
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Manufacturer:
CRIIUS
Quantity:
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Company:
Part Number:
CS42528-CQZR
Manufacturer:
Cirrus Logic Inc
Quantity:
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Manufacturer:
CIRRUS
Quantity:
20 000
56
6.10
6.10.1 BURST PREAMBLE BITS (PCX & PDX)
6.11
6.11.1 SINGLE VOLUME CONTROL (SNGVOL)
6.11.2 SOFT RAMP AND ZERO CROSS CONTROL (SZCX)
Reserved
PCx-7
PDx-7
7
7
Burst Preamble PC and PD Bytes (addresses 09h - 0Ch)(Read Only)
Volume Transition Control (address 0Dh)
Immediate Change
Zero Cross
Default = xxh
Function:
Default = 0
Function:
Default = 00
00 - Immediate Change
01 - Zero Cross
10 - Soft Ramp
11 - Soft Ramp on Zero Crossings
Function:
The PC and PD burst preamble bytes are loaded into these four registers.
The individual channel volume levels are independently controlled by their respective Volume Control
registers when this function is disabled. When enabled, the volume on all channels is determined by
the A1 Channel Volume Control register and the other Volume Control registers are ignored.
When Immediate Change is selected, all level changes will take effect immediately in one step.
Zero Cross Enable dictates that signal-level changes, either by attenuation changes or muting, will
SNGVOL
PCx-6
PDx-6
6
6
RCVR_CLK2 RCVR_CLK1 RCVR_CLK0
0
0
0
0
1
1
1
1
PCx-5
PDx-5
SZC1
Table 14. Receiver Clock Frequency Detection
5
5
0
0
1
1
0
0
1
1
PCx-4
PDx-4
SZC0
4
4
0
1
0
1
0
1
0
1
AMUTE
PCx-3
PDx-3
3
3
MUTE SAI_SP
Description
11.2896 MHz
16.3840 MHz
22.5792 MHz
24.5760 MHz
45.1584 MHz
49.1520 MHz
8.1920 MHz
12.288 MHz
PCx-2
PDx-2
2
2
RAMP_UP
PCx-1
PDx-1
1
1
CS42528
RAMP_DN
PCx-0
PDx-0
DS586F1
0
0