IDTSTAC9753XXTAEB2XR IDT, Integrated Device Technology Inc, IDTSTAC9753XXTAEB2XR Datasheet - Page 67

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IDTSTAC9753XXTAEB2XR

Manufacturer Part Number
IDTSTAC9753XXTAEB2XR
Description
IC CODEC AC'97 MIC/JACK 48-QFP
Manufacturer
IDT, Integrated Device Technology Inc
Type
Audio Codec '97r
Datasheet

Specifications of IDTSTAC9753XXTAEB2XR

Resolution (bits)
20 b
Number Of Adcs / Dacs
2 / 2
Sigma Delta
Yes
Voltage - Supply, Analog
3.14 V ~ 3.47 V; 4.75 V ~ 5.25 V
Voltage - Supply, Digital
3.14 V ~ 3.47 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
48-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
STAC9753XXTAEB2XR

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
IDTSTAC9753XXTAEB2XR
Manufacturer:
IDT, Integrated Device Technology Inc
Quantity:
10 000
IDT™
TWO-CHANNEL, 20-BIT, AC’97 2.3 CODECS WITH HEADPHONE DRIVE, SPDIF OUTPUT MICROPHONE & JACK SENSING
STAC9752/9753
TWO-CHANNEL, 20-BIT, AC’97 2.3 CODECS WITH HEADPHONE DRIVE, SPDIF OUTPUT MICROPHONE & JACK SENSING
8.2.8.
8.2.9.
Bit(s)
15:2
Bit(s)
15:2
1
0
1
0
D15
D15
D7
D7
GPIO Pin Mask Register (52h)
Default: 0000h
GPIO Pin Status Register (54h)
Default: 0000h
Read / Write
Read / Write
Read Only
Access
Read / Write
Read / Write
Read Only
Access
D14
D14
D6
D6
Reset Value
Reset Value
0
x
x
0
0
0
D13
D13
D5
D5
RESERVED Bits not used, should read back 0
RESERVED
RESERVED
Name
GI1
GI0
RESERVED
Name
GW1
GW0
D12
D12
67
D4
D4
When GPIO1 is configured as output and Register h74 bit[0] = 0
(default), the value of this register will be placed on the GPIO1
pad.
When GPIO1 is configured as output and Register h74 bit[0] =1,
the GPIO1 pad will get its value from slot12.
When GPIO1 is configured as input and configured as a sticky bit,
writing a 1 does nothing, writing a 0 clears this bit.
When GPIO1 is configured as input, this register reflects the value
on the GPIO1 pad after interpretation of the polarity and sticky
configurations.
When GPIO0 is configured as output and Register h74 bit[0] = 0
(default), the value of this register will be placed on the GPIO0
pad.
When GPIO0 is configured as output and Register h74 bit[0] =1,
the GPIO0 pad will get its value from slot12.
When GPIO0 is configured as input and configured as a sticky bit,
writing a 1 does nothing, writing a 0 clears this bit.
When GPIO0 is configured as input, this register reflects the value
on the GPIO0 pad after interpretation of the polarity and sticky
configurations.
RESERVED
RESERVED
Bit not used, should read back 0
0 = GPIO1 interrupt not passed to GPIO_INT slot 12.
1 = GPIO1 interrupt is passed to GPIO_INT slot 12.
0 = GPIO0 interrupt not passed to GPIO_INT slot 12.
1 = GPIO0 interrupt is passed to GPIO_INT slot 12.
D11
D11
D3
D3
STAC9752/9753
Description
D10
D10
D2
D2
Description
GI1 (GPIO1)
(GPIO1)
GW1
D9
D1
D9
D1
GI0 (GPIO0)
REV 3.3 1206
(GPIO0)
GW0
D8
D0
D8
D0

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