IDTSTAC9204D3TAEB2X IDT, Integrated Device Technology Inc, IDTSTAC9204D3TAEB2X Datasheet - Page 14
IDTSTAC9204D3TAEB2X
Manufacturer Part Number
IDTSTAC9204D3TAEB2X
Description
IC AUD CODEC 4CH HD 3.3V 48-LQFP
Manufacturer
IDT, Integrated Device Technology Inc
Type
Audio Codec, HDr
Specifications of IDTSTAC9204D3TAEB2X
Resolution (bits)
24 b
Number Of Adcs / Dacs
2 / 2
Sigma Delta
No
S/n Ratio, Adcs / Dacs (db) Typ
98 / 103
Dynamic Range, Adcs / Dacs (db) Typ
98 / 95
Voltage - Supply, Analog
3.14 V ~ 3.47 V; 3.8 V ~ 4.2 V; 4.28 V ~ 4.73 V; 4.75 V ~ 5.25 V
Voltage - Supply, Digital
3.14 V ~ 3.47 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
48-LQFP
Single Supply Voltage (typ)
3.3V
Single Supply Voltage (min)
3.135V
Single Supply Voltage (max)
3.465V
Package Type
TQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
STAC9204D3TAEB2X
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IDT™
4-CHANNEL HD AUDIO CODEC WITH QUAD DIGITAL MICROPHONE INTERFACE
STAC9204/9205
4-CHANNEL HD AUDIO CODEC WITH QUAD DIGITAL MICROPHONE INTERFACE
1.3.
Detailed Description
1.3.1.
1.3.2.
Low-voltage High Definition Audio Link Signaling
The STAC9204/9205 are compatible with either 1.5 V or 3.3 V High Definition Audio Link signaling;
the voltage selection is performed dynamically based on the input voltage of DVDD_IO. Note that
DVDD_IO is not a logic configuration pin but provides the digital power supply to be used for the
High Definition Audio Link signals.
When in 1.5 V mode, the STAC9204/9205 can correctly decode BITCLK, SYNC, RESET# and SDO
because they operate at 1.5 V. Additionally, it will drive SDI_CODEC at 1.5 V. None of the GPIOs are
affected, as they always function at their nominal voltage (DVDD or AVDD).
Digital Microphone Support
The digital microphone interface permits connection of digital microphones to the STAC9205 via the
DMIC0, DMIC1, and DMIC_CLK three-pin interface. The DMIC0 and DMIC1 pins carry either 1 or 2
channels of digital microphone data to the STAC9205. In the event that a single microphone is used,
the data is routed to both ADC channels.
The DMIC_CLK output is programmable from 1.176 MHz to 4.704 MHz in 1.176 MHz increments
and is synchronous to the 24 MHz internal clock. The default frequency is 2.352 MHz.
The STAC9205 supports the digital microphone configurations listed in Table 1.
I/O Controller Hub (ICH)
Figure 2. System Diagram
HD Audio Bus
14
STAC9204/05/54/55
STAC9204/9205
Head Phone
Speakers
Sub Woofer
Line In
Microphone
PC AUDIO
V 1.0 12/06
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