IDTSTAC9204D3TAEB2X IDT, Integrated Device Technology Inc, IDTSTAC9204D3TAEB2X Datasheet - Page 44

• Manufacturer Part Number: IDTSTAC9204D3TAEB2X
• Description: IC AUD CODEC 4CH HD 3.3V 48-LQFP
• Manufacturer: IDT, Integrated Device Technology Inc
• Type: Audio Codec, HDr

Specifications of IDTSTAC9204D3TAEB2X

• Resolution (bits): 24 b
• Number Of Adcs / Dacs: 2 / 2
• Sigma Delta: No
• S/n Ratio, Adcs / Dacs (db) Typ: 98 / 103
• Dynamic Range, Adcs / Dacs (db) Typ: 98 / 95
• Voltage - Supply, Analog: 3.14 V ~ 3.47 V; 3.8 V ~ 4.2 V; 4.28 V ~ 4.73 V; 4.75 V ~ 5.25 V
• Voltage - Supply, Digital: 3.14 V ~ 3.47 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 48-LQFP
• Single Supply Voltage (typ): 3.3V
• Single Supply Voltage (min): 3.135V
• Single Supply Voltage (max): 3.465V
• Package Type: TQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: STAC9204D3TAEB2X

IDT™
4-CHANNEL HD AUDIO CODEC WITH QUAD DIGITAL MICROPHONE INTERFACE
STAC9204/9205
4-CHANNEL HD AUDIO CODEC WITH QUAD DIGITAL MICROPHONE INTERFACE
3.4.2.14. AFG GPIODir
[31:5]
[31:5]
Bit
Bit
[4]
[3]
[2]
[1]
[0]
[4]
Set1
Get
Bitfield Name
Bitfield Name
Control4
Mask4
Mask3
Mask2
Mask1
Mask0
Rsvd
Rsvd
Table 45. AFG GPIOEn Command Response Format
Table 47. AFG GPIODir Command Response Format
Table 46. AFG GPIODir Command Verb Format
Verb ID
F17
717
RW
RW
RW
RW
RW
RW
RW
RW
44
R
R
See bits [7:0] of bitfield table.
Reset
Reset
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
Payload
Reserved
Enable for GPIO4:
0 = pin is disabled (Hi-Z state);
1 = pin is enabled; behavior determined by
GPIO Direction control
Enable for GPIO3:
0 = pin is disabled (Hi-Z state);
1 = pin is enabled; behavior determined by
GPIO Direction control
Enable for GPIO2:
0 = pin is disabled (Hi-Z state);
1 = pin is enabled; behavior determined by
GPIO Direction control
Enable for GPIO1:
0 = pin is disabled (Hi-Z state);
1 = pin is enabled; behavior determined by
GPIO Direction control
Enable for GPIO0:
0 = pin is disabled (Hi-Z state);
1 = pin is enabled; behavior determined by
GPIO Direction control
Reserved
Direction control for GPIO4
0 = GPIO signal is configured as input
1 = GPIO signal is configured as output
00
STAC9204/9205
Description
Description
See bitfield table.
0000_0000h
Response
PC AUDIO
V 1.0 12/06