IDTSTAC9271D5TAEB4X IDT, Integrated Device Technology Inc, IDTSTAC9271D5TAEB4X Datasheet - Page 49

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IDTSTAC9271D5TAEB4X

Manufacturer Part Number
IDTSTAC9271D5TAEB4X
Description
IC AUDIO CODEC 10CH HD 5V 48TQFP
Manufacturer
IDT, Integrated Device Technology Inc
Type
Audio Codec, HDr
Datasheet

Specifications of IDTSTAC9271D5TAEB4X

Resolution (bits)
24 b
Number Of Adcs / Dacs
3 / 5
Sigma Delta
Yes
S/n Ratio, Adcs / Dacs (db) Typ
90 / 105
Dynamic Range, Adcs / Dacs (db) Typ
90 / 95
Voltage - Supply, Analog
3.14 V ~ 3.47 V; 3.8 V ~ 4.2 V; 4.28 V ~ 4.73 V; 4.75 V ~ 5.25 V
Voltage - Supply, Digital
3.14 V ~ 3.47 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
48-TQFP, 48-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
STAC9271D5TAEB4X

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
IDTSTAC9271D5TAEB4X
Manufacturer:
IDT, Integrated Device Technology Inc
Quantity:
10 000
Part Number:
IDTSTAC9271D5TAEB4XR
Manufacturer:
IDT, Integrated Device Technology Inc
Quantity:
10 000
IDT™
STAC9271/9274
10-CHANNEL HIGH DEFINITION AUDIO CODEC
10-CHANNEL HIGH DEFINITION AUDIO CODEC
6.2.15. AFG GPIODir
[31.:5]
[31.:5]
Bit
Bit
[4]
[3]
[2]
[1]
[0]
[4]
Set1
Get
Bitfield Name
Bitfield Name
Control4
Mask4
Mask3
Mask2
Mask1
Mask0
Rsvd
Rsvd
Table 41. AFG GPIOEn
Table 43. AFG GPIODir
Table 42. AFG GPIODir
IDT CONFIDENTIAL
Verb ID
F17
717
RW
RW
RW
RW
RW
RW
RW
RW
49
R
R
See bits [7:0] of bitfield table.
Command Response Format
Command Response Format
Reset
Reset
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
Command Verb Format
Payload
Reserved
Enable for GPIO4:
0= pin is disabled (Hi-Z state);
1= pin is enabled; behavior determined by
GPIO Direction control
Enable for GPIO3:
0= pin is disabled (Hi-Z state);
1= pin is enabled; behavior determined by
GPIO Direction control
Enable for GPIO2:
0= pin is disabled (Hi-Z state);
1= pin is enabled; behavior determined by
GPIO Direction control
Enable for GPIO1:
0= pin is disabled (Hi-Z state);
1= pin is enabled; behavior determined by
GPIO Direction control
Enable for GPIO0:
0= pin is disabled (Hi-Z state);
1= pin is enabled; behavior determined by
GPIO Direction control
Reserved
Direction control for GPIO4
0= GPIO signal is configured as input
1= GPIO signal is configured as output
00
STAC9271/9274
Description
Description
See bitfield table.
0000_0000h
Response
PC AUDIO
V 1.1 01/08

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