EMC1428-1-AP-TR SMSC, EMC1428-1-AP-TR Datasheet - Page 38

• Manufacturer Part Number: EMC1428-1-AP-TR
• Description: Board Mount Temperature Sensors Octal Temp Sensor
• Manufacturer: SMSC

Specifications of EMC1428-1-AP-TR

• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

APPLICATION NOTE: If one of the fault queues is not cleared and the CALRT[2:0] (or CTHRM[2:0]) bits are
Revision 0.69 (06-29-09)
When the ALERT pin is configured as an interrupt and the consecutive alert counter reaches its
programmed value then the STATUS bit(s) for that channel and the error condition will be set to ‘1’
and the ALERT pin will be asserted. Measurements will continue normally.
When the ALERT pin is configured as a comparator, the consecutive alert counter will ignore diode
fault and low limit errors and only increment if the measured temperature meets or exceeds the High
Limit. Additionally, once the consecutive alert counter reaches the programmed limit, the ALERT pin
will be asserted, but the counter will not be reset. It will remain set until the temperature drops below
the High Limit minus the THERM Hysteresis value.
For example, if the CALRT[2:0] bits are set for 4 consecutive alerts on an EMC1428 device, the high
limits are set at 70°C, and none of the channels are masked, then the status bits will be asserted after
the following four measurements:
1. Internal Diode reads 71°C and both external diodes read 69°C. Consecutive alert counter for INT
2. Both the Internal Diode and the External Diode 1 read 71°C and External Diode 2 reads 68°C.
3. The External Diode 1 reads 71°C and both the Internal Diode and External Diode 2 read 69°C.
4. The Internal Diode reads 71°C and both external diodes read 71°C. Consecutive alert counter for
5. The Internal Diode reads 71°C and both the external diodes read 71°C. Consecutive alert counter
Bit 7 - TIMEOUT - Determines whether the SMBus Timeout function is enabled.
Bits 6-4 CTHRM[2:0] - Determines the number of consecutive measurements that must exceed the
corresponding THERM Limit and Hardware Thermal Shutdown Limit before the SYS_SHDN pin is
asserted. All temperature channels use this value to set the respective counters. The consecutive
THERM counter is incremented whenever any of the measurements exceed the corresponding
THERM Limit or if the External Diode 1 measurement meets or exceeds the Hardware Thermal
Shutdown Limit.
If the temperature drops below the THERM limit or Hardware Thermal Shutdown Limit, then the
counter is reset. If the programmed number of consecutive measurements exceed the THERM Limit
or Hardware Thermal Shutdown Limit, and the appropriate channel is linked to the SYS_SHDN pin,
then the SYS_SHDN pin will be asserted low.
Once the SYS_SHDN pin is asserted, the consecutive THERM counter will not reset until the
corresponding temperature drops below the appropriate limit minus the corresponding hysteresis.
The bits are decoded as shown in
conversions.
Bits 3-1 - CALRT[2:0] - Determine the number of consecutive measurements that must have an out of
limit condition or diode fault before the STATUS bits is asserted. All temperature channels use this
value to set the respective counters. The bits are decoded as shown in
is 1 consecutive out of limit conversion.
‘0’ (default) - The SMBus Timeout feature is disabled. The SMCLK line can be held low indefinitely
without the device resetting its SMBus protocol.
‘1’ - The SMBus Timeout feature is enabled. If the SMCLK line is held low for more than 30ms,
then the device will reset the SMBus protocol.
is incremented to 1.
Consecutive alert counter for INT is incremented to 2 and for EXT1 is set to 1.
Consecutive alert counter for INT and EXT2 are cleared and EXT1 is incremented to 2.
INT is set to 1, EXT2 is set to 1, and EXT1 is incremented to 3.
for INT is incremented to 2, EXT2 is set to 2, and EXT1 is incremented to 4. The HIGH status bit
are set for EXT1 and the ALERT pin is asserted. The EXT1 counter is reset to 0 and all other
counters hold the last value until the next temperature measurement.
updated, the update won’t take affect until fault queue is cleared. All the fault queues are
independent so those that are empty will be updated immediately.
1°C Multiple Temperature Sensor with HW Thermal Shutdown & Hottest of Thermal Zones
DATASHEET
Table
38
5.18. The default setting is 4 consecutive out of limit
Table
5.18. The default setting
SMSC EMC1428
Datasheet