EMC1428-1-AP-TR SMSC, EMC1428-1-AP-TR Datasheet - Page 41
![no-image](/images/manufacturer_photos/0/6/617/smsc_sml.jpg)
EMC1428-1-AP-TR
Manufacturer Part Number
EMC1428-1-AP-TR
Description
Board Mount Temperature Sensors Octal Temp Sensor
Manufacturer
SMSC
Datasheet
1.EMC1428-1-AP-TR.pdf
(49 pages)
Specifications of EMC1428-1-AP-TR
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
ADDR
ADDR.
35h
36h
1°C Multiple Temperature Sensor with HW Thermal Shutdown & Hottest of Thermal Zones
Datasheet
SMSC EMC1428
5.18
5.19
R/W
R-C
R/W
R-C
High Limit Status Register
Low Limit Status Register
Bit 3 - EXT3 - The External Diode 3 channel is the hottest.
Bit 2 - EXT2 - The External Diode 2 channel is the hottest.
Bit 1 - EXT1 - The External Diode 1 channel is the hottest.
Bit 0 - INT - The Internal Diode channel is the hottest.
The High Limit Status Register contains the status bits that are set when a temperature channel high
limit is exceeded for a number of consecutive readings as set by the consecutive alert counts (see
Section
Reading from the High Limit Status Register will clear all bits if the error condition has been removed.
Reading from the register will also clear the HIGH status bit in the Status Register.
The ALERT pin will be set if any of these status bits are set.
Bit 7 - E7HIGH - This bit is set when the External Diode 7 channel meets or exceeds its programmed
high limit.
Bit 6 - E6HIGH - This bit is set when the External Diode 6 channel meets or exceeds its programmed
high limit.
Bit 5 - E5HIGH - This bit is set when the External Diode 5 channel meets or exceeds its programmed
high limit.
Bit 4 - E4HIGH - This bit is set when the External Diode 4 channel meets or exceeds its programmed
high limit.
Bit 3 - E3HIGH - This bit is set when the External Diode 3 channel meets or exceeds its programmed
high limit.
Bit 2 - E2HIGH - This bit is set when the External Diode 2 channel meets or exceeds its programmed
high limit.
Bit 1 - E1HIGH - This bit is set when the External Diode 1 channel meets or exceeds its programmed
high limit.
Bit 0 - IHIGH - This bit is set when the Internal Diode channel meets or exceeds its programmed high
limit.
REGISTER
High Limit
Status
REGISTER
Low Limit
Status
5.14). If any of these bits are set, then the HIGH status bit in the Status Register is set.
HIGH
B7
E7
LOW
B7
E7
Table 5.23 High Limit Status Register
Table 5.24 Low Limit Status Register
HIGH
B6
E6
LOW
B6
E6
DATASHEET
HIGH
B5
E5
LOW
B5
E5
41
HIGH
B4
E4
LOW
B4
E4
HIGH
B3
E3
LOW
B3
E3
HIGH
B2
E2
LOW
B2
E2
HIGH
LOW
B1
E1
B1
E1
Revision 0.69 (06-29-09)
ILOW
HIGH
B0
B0
I
DEFAULT
DEFAULT
00h
00h